Fujitsu F2MC-8L MB89620 Series Hardware Manual page 19

Table 10.3.1 Serial 1 Mode Register (SMR1) Bits .................................................................................. 205
Table 10.4.1 Serial 2 Mode Register (SMR2) Bits .................................................................................. 211
Table 10.5 Register and Vector Table for 8-bit Serial I/O Interrupts ....................................................... 213
CHAPTER 11 BUZZER OUTPUT ...................................................................................... 225
Table 11.1 Output Frequency ................................................................................................................. 226
Table 11.4 Buzzer Register (BZCR) Bits ................................................................................................ 229
CHAPTER 12 EXTERNAL INTERRUPT CIRCUIT (EDGE) ............................................... 231
Table 12.3 External Interrupt Circuit Pins ............................................................................................... 234
Table 12.3.1 External Interrupt Control Register 1 (EIC1) Bits ............................................................... 237
Table 12.3.2 External Interrupt 2 Control Register (EIC2) Bits ............................................................... 239
Table 12.4 Register and Vector Table for External Interrupt Circuit Interrupts ....................................... 240
CHAPTER 13 A/D CONVERTER ....................................................................................... 243
Table 13.3.1 A/D Control Register 1 (ADC1) Bits ................................................................................... 251
Table 13.3.2 A/D Control Register 2 (ADC2) Bits ................................................................................... 253
Table 13.3.3 Example of ADCD Register Setting for Sense Function .................................................... 254
Table 13.4 Register and Vector Table for A/D Converter Interrupt ......................................................... 255
CHAPTER 14 CLOCK MONITOR FUNCTION ................................................................... 263
Table 14.4 Clock Output Control Register (CLKE) Bits .......................................................................... 267
APPENDIX ............................................................................................................................ 269
Table A I/O Map................................................................................................................................ ...... 270
Table Ba Instruction List Symbols .......................................................................................................... 272
Table Bb Instruction List Columns .......................................................................................................... 273
Table B.1 Vector Table Addresses corresponding to "vct" ..................................................................... 276
Table B.3a Transfer Instructions ............................................................................................................. 280
Table B.3b Arithmetic Operation Instructions ......................................................................................... 281
Table B.3c Branch Instructions ............................................................................................................... 282
Table B.3d Other Instructions ................................................................................................................. 282
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Table B.4 F MC-8L Instruction Map ........................................................................................................ 283
Table B.5 Bus Operation for Bit Manipulation Instructions ..................................................................... 284
Table Ca Mask Options .......................................................................................................................... 285
Table Cb Ordering Information ............................................................................................................... 286
Table Da EPROM Programmer Socket Adaptor .................................................................................... 287
Table Db OTPROM Option Bit Map (MB89P625, MB89W625) .............................................................. 290
Table Dc OTPROM Option Bit Map (MB89P627, MB89W627) .............................................................. 291
Table Dd OTPROM Option Bit Map (MB89P629) .................................................................................. 292
Table D.2 Programming Socket Adapter ................................................................................................ 294
Table Ea Pin States in Each Mode (Single-chip Mode) .......................................................................... 295
Table Eb Pin States in Each Mode (External ROM Mode or Internal ROM/External Bus Mode) ........... 296
MB89620 series
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