Fujitsu F2MC-8L MB89620 Series Hardware Manual page 124

l Operation in stop mode
The pins go to the high-impedance state if the pin state specification bit in the standby control
register (STBC: SPL) is "1" when the device changes to stop mode. This is achieved by forcibly
setting the output buffer "OFF" regardless of the DDR3 register value.
Table 4.4.2 lists the port 3 pin states.
Table 4.4.2 Port 3 Pin State
Normal operation
Pin name Sleep mode Stop mode (SPL=1) Reset
Stop mode (SPL=0)
General-purpose I/O ports/
P30/ADST/CLKO to P37/PTO Hi-z Hi-z
peripheral I/O
SPL : Pin state specification bit in the standby control register (STBC)
Hi-z : High impedance
Note: Pins with a pull-up resistor (optional) go to the "H" level (pull-up state) rather than to the high-
impedance state when the output buffer is "OFF".
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MB89620 series CHAPTER 4 I/O PORTS