Figure B.1D Index Addressing; Figure B.1E Pointer Addressing; Figure B.1F General-Purpose Register Addressing; Figure B.1G Immediate Addressing - Fujitsu F2MC-8L MB89620 Series Hardware Manual

l Index addressing
Indicated by "@IX+off" in the instruction list. Used to access the entire 64-Kbyte area. Index
addressing generates the address by adding the sign-extended contents of the first operand to
the index register (IX). Figure B.1d shows an example.
Pointer addressing
l
Indicated by "@EP" in the instruction list. Used to access the entire 64-Kbyte area. Pointer
addressing uses the extra pointer (EP) as the address. Figure B.1e shows an example.
General-purpose register addressing
l
Indicated by "Ri" in the instruction list. Used to access register banks in the general-purpose
register area. For general-purpose register addressing, the upper one byte of the address is
fixed at "01" and the lower one byte is generated from the register bank pointer (RP) and the
lower three bits of the operation code. The CPU accesses the resulting address. Figure B.1f
shows an example.
l Immediate addressing
Indicated by "#d8" in the instruction list. Used when immediate data is required. In immediate
addressing, the operand is used directly as immediate data. The operation code determines
whether the data is byte or word. Figure B.1g shows an example.
MB89620 series
MOVW A,@IX+5 AH
27A5
+
H
IX

Figure B.1d Index Addressing

MOVW A,@EP
27A5
H
EP

Figure B.1e Pointer Addressing

MOV A,R6
+
01010
B
RP

Figure B.1f General-Purpose Register Addressing

MOV A,#56H

Figure B.1g Immediate Addressing

27FF 12
H H
A 1234
2800 34
H H
27A5 12
H H
A 1234
27A6 34
H H
AB A
0156
H
H
A
H
H
AB
H
56
H
APPENDIX
APPEND
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