Fujitsu F2MC-8L MB89620 Series Hardware Manual page 208

Table 9.3.1 16-bit timer Control Register (TMCR) Bits
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MB89620 series
Bit
• The read value is indeterminate.
Unused bits
• Writing to these bits has no effect on the operation.
This bit clears the 16-bit timer count register (TCR).
TCR: Writing "0" to this bit clears the timer count register to "0000
Counter clear bit bit has no effect and does not change the bit value.
Note: Reading this bit always returns "1".
• These bits switch between the interval timer function and counter function.
Writing "00
TCS1, TCS0: internal count clock.
Counter operating • Selecting the detection edge (falling, rising, or both edges) of the external count
mode selection bits clock sets 16-bit counter operation.
Check: Set the P34/EC pin as an input port for the counter function (TCS1, TCS0
• This bit is set to "1" when the counter overflows.
TCEF: • An interrupt request is output when both this bit and the interrupt request enable
Interrupt request flag bit (TCIE) are "1".
bit • Writing "0" clears this bit. Writing "1" has no effect and does not change the bit
value.
TCIE: • This bit enables or disables an interrupt request output to the CPU.
Interrupt request • An interrupt request is output when both this bit and the interrupt request flag bit
enable bit (TCEF) are "1".
• This bit activates or stops the counter.
TCS: • Writing "1" to this bit starts the count operation of the timer count register (TCR).
Counter start bit The TCR starts counting-up on the count clock. Writing "0" to this bit stops
counter operation but maintains the TCR counter value.
Function
" to these bits sets the interval timer function which operates on the
B
= other than "00 ").
B
CHAPTER 9 16-BIT TIMER/COUNTER
". Writing "1" to this
H
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