Figure 10.4.1 Serial 2 Mode Register (Smr2) - Fujitsu F2MC-8L MB89620 Series Hardware Manual

10.4 Structure of 8-bit Serial I/O-2
10.4.1 Serial 2 Mode Register (SMR2)
The serial 2 mode register (SMR2) is used to enable or disable operation, select the
shift clock, set the transfer direction, control interrupts, and check the state of 8-bit
serial I/O-2.
n Serial 2 Mode Register (SMR2)
Address
001E
H
R/W : Readable and writable
210
CHAPTER 10 8-BIT SERIAL I/O (SERIAL I/O-1 AND SERIAL I/O-2)
Bit 7 Bit 6 Bit 5 Bit 4
SIOF SIOE SCKE SOE
R/W R/W R/W R/W
: Initial value

Figure 10.4.1 Serial 2 Mode Register (SMR2)

Bit 3 Bit 2 Bit 1 Bit 0
CKS1 CKS0 BDS SST
R/W R/W R/W R/W
SST
0
Serial transfer stopped.
1
Serial transfer operating.
BDS Transfer direction selection bit
LSB first
0
(starts transfer from the least significant bit)
MSB first
1
(starts transfer from the most significant bit)
CKS1 CKS0
0 0
0 1 Internal shift clock
1 0
1 1 External shift clock
t : Instruction cycle
inst
SOE
0 Functions P46/SO2 as a general-purpose port.
1 Functions P46/SO2 as the serial data output pin.
SCKE
Functions P45/SCK2 as a general-purpose port
0
or shift clock input pin.
1 Functions P45/SCK2 as the shift clock output pin.
SIOE
0 Disables interrupt request output.
1 Enables interrupt request output.
SIOF
0
Transfer has not completed.
1
Transfer has completed.
Initial value
00000000
B
Serial I/O transfer start bit
Read Write
Stops/disables serial transfer.
Starts/enables serial transfer.
Shift clock selection bits
2 t
inst
8 t
inst
32 t
inst
Serial data output enable bit
Shift clock output enable bit
Interrupt request enable bit
Interrupt request flag bit
Read Write
Clears this bit.
No effect. The bit does not
change.
MB89620 series
SCK2
pin
Output
Output
Output
Input