Fujitsu F2MC-8L MB89620 Series Hardware Manual page 341

Interrupt request enable bit (TIE) .................................................................................................................144
Interrupt request enable bit 0 (EIE0) ...........................................................................................................236
Interrupt request enable bit 1 (EIE1) ...........................................................................................................236
Interrupt request enable bit 2 (EIE2) ............................................................................................................238
Interrupt request enable bit 3 (EIE3) ...........................................................................................................238
Interrupt request flag bit (SIOF) ...........................................................................................................204, 210
Interrupt request flag bit (TCEF) ..................................................................................................................186
Interrupt request flag bit (TIR) .....................................................................................................................144
Interval time selection bit (TBC0) ................................................................................................................120
Interval time selection bit (TBC1) ................................................................................................................120
M
Measured pulse selection bit (W0) ..............................................................................................................166
Measured pulse selection bit (W1) ..............................................................................................................166
Measurement completion interrupt request flag bit (IR) ..............................................................................164
N
Negative flag (N) ............................................................................................................................................38
O
Operating mode selection bit (P/TX) ...........................................................................................................144
Operation mode selection bit (FC) ...............................................................................................................166
Output pin control bit (OE) ...........................................................................................................................144
Output pin control bit (TOE) .........................................................................................................................164
Overflow flag (V) ............................................................................................................................................38
Overflow interrupt request flag bit (TBOF) ...................................................................................................120
P
Pin state specification bit (SPL)......................................................................................................................70
Port 0 data direction register (DDR0) ............................................................................................................92
Port 0 data register (PDR0) ...........................................................................................................................92
Port 1 data direction register (DDR1) ............................................................................................................92
Port 1 data register (PDR1) ...........................................................................................................................92
Port 2 data register (PDR2) ...........................................................................................................................96
Port 3 data direction register (DDR3) ..........................................................................................................100
Port 3 data register (PDR3) .........................................................................................................................100
Port 4 data register (PDR4) .........................................................................................................................106
Port 5 data register (PDR5) .........................................................................................................................110
Port 6 data register (PDR6) ..........................................................................................................................114
Program counter (PC) ...................................................................................................................................36
Program status (PS) ......................................................................................................................................36
PWC pulse width control register 1 (PCR1) ................................................................................................164
PWC pulse width control register 2 (PCR2) ................................................................................................166
PWC reload buffer register (RLBR) .............................................................................................................168
PWM compare register (COMR) .................................................................................................................146
PWM control register (CNTR) ......................................................................................................................144
R
Reload mode selection bit (RM) ...................................................................................................................166
MB89620 series
IN
319
Register Index