Fujitsu F2MC-8L MB89620 Series Hardware Manual page 291

A I/O Map
Table A lists the addresses of the registers used by the internal peripheral functions of
the MB89620 series.
Table A I/O Map
Address
00
H
01
H
02
H
03
H
04
H
05
H
06
H
07
H
08
H
09
H
0A
H
0B
H
0C
H
0D
H
0E
H
0F
H
10
H
11
H
12
H
13
H
14
H
15
H
16
H
17
H
18
H
19
H
1A
H
1B
H
1C
H
1D
H
1E
H
1F
H
20
H
21
H
270
APPENDIX
Register
name
PDR0 Port 0 data register
DDR0 Port 0 data direction register
PDR1 Port 1 data register
DDR1 Port 1 data direction register
PDR2 Port 2 data register
BCTR External bus pin control register
STBC Standby control register
WDTC Watchdog timer control register
TBTC Timebase timer control register
PDR3 Port 3 data register
DDR3 Port 3 data direction register
PDR4 Port 4 data register
BZCR Buzzer register
PDR5 Port 5 data register
PDR6 Port 6 data register
CNTR PWM control register
COMR PWM compare register
PCR1 PWC pulse width control register 1
PCR2 PWC pulse width control register 2
RLBR PWC reload buffer register
TMCR 16-bit timer control register
TCHR 16-bit timer count register (H)
TCLR 16-bit timer count register (L)
SMR1 Serial 1 mode register
SDR1 Serial 1 data register
SMR2 Serial 2 mode register
SDR2 Serial 2 data register
ADC1 A/D control register 1
ADC2 A/D control register 2
Register description
(Vacancy)
(Vacancy)
(Vacancy)
(Vacancy)
(Vacancy)
Read/Write Initial value
R/W XXXXXXXX
B
W 00000000
B
R/W XXXXXXXX
B
W 00000000
B
R/W 00000000
B
W XXXXXX01
B
XXXXXXXX
B
XXXXXXXX
B
R/W 0001XXXX
B
W XXXXXXXX
B
R/W XXX00000
B
XXXXXXXX
B
R/W XXXXXXXX
B
W 00000000
B
R/W 11111111
B
R/W XXXXXX00
B
R/W 11111111
B
R XXXXXXXX
B
R/W 0X000000
B
W XXXXXXXX
B
R/W 000XX000
B
R/W 000X0000
B
R/W XXXXXXXX
B
XXXXXXXX
B
R/W XX000000
B
R/W 00000000
B
R/W 00000000
B
XXXXXXXX
B
R/W 00000000
B
R/W XXXXXXXX
B
R/W 00000000
B
R/W XXXXXXXX
B
R/W 00000000
B
R/W XXX00001
B
MB89620 series