Figure 4.6 Block Diagram Of Port 5 Pin - Fujitsu F2MC-8L MB89620 Series Hardware Manual

n Block Diagram of Port 5 Pin
SPL: Pin state specification bit in the standby control register (STBC)
Check: • If using the A/D converter, do not set a pull-up resistor (optional) for any of P57/AN7 to P50/AN0,
• Do not use the pins as output ports if using as an analog input.
n Port 5 Registers
The port 5 register consists of PDR5.
Each bit in the register has a one-to-one relationship with a port 5 pin.
Table 4.6b shows the correspondence between the pins and register for port 5.
Table 4.6b Correspondence between Pin and Register for Port 5
Port
Port 5
MB89620 series
PDR (Port data register)
PDR read
Output latch
PDR write
Stop mode (SPL=1)

Figure 4.6 Block Diagram of Port 5 Pin

and set the output latch to "1" to turn the output transistor "OFF".
PDR5
Corresponding pin
To A/D converter
analog input
A/D converter
channel selector
Correspondence between register bit and pin
Bit 7 Bit 6 Bit 5
P57 P56 P55
Pull-up resistor
(optional)
Approx. 50 kΩ/5.0 V
Pin
Output
Tr
Bit 4 Bit 3 Bit 2 Bit 1
P54 P53 P52 P51
CHAPTER 4 I/O PORTS
Bit 0
P50
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