3.7 Standby Modes (Low-power Consumption)
3.7.4 State Transition Diagram
This section shows the state transition diagram for when a reset or interrupt operation
is performed during normal operation (RUN state) or during a standby mode (sleep or
stop mode).
n Products with Power-on Reset
n Products without Power-on Reset
72
CHAPTER 3 CPU
Power on
Power-on reset
Oscillation
stabilization delay
reset state
(11)
(10)
(8)
Oscillation
stabilization delay
(1)
: Wake up from reset input
(2)
: Reset source (multiple)
(3)
: Change to sleep mode by setting the standby control register (STBC: SLP=1).
(4)
: External reset input
(5)
: Change to stop mode by setting the standby control register (STBC: STP=1).
(6)
: Interrupt request
(7)
: External interrupt request
(8) (9)
: Timebase timer overflow (oscillation stabilization delay time complete)
(10) (11) : External reset input
Figure 3.7.4a State Transition Diagram for Products with Power-on Reset
(10)
(8)
Oscillation
stabilization delay
(1)
: Wake up from reset input
(2)
: Reset source (multiple)
(3)
: Change to sleep mode by setting the standby control register (STBC: SLP=1).
(4)
: External reset input
(5)
: Change to stop mode by setting the standby control register (STBC: STP=1).
(6)
: Interrupt request
(7)
: External interrupt request
(8)
: Timebase timer overflow (oscillation stabilization delay time complete)
(9) (10) (11): External reset input (for the length of the oscillation stabilization delay time)
Figure 3.7.4b State Transition Diagram for Products without Power-on Reset
(9)
Reset state
(2)
(1)
RUN state
(5)
(7)
Stop mode
Power on
(9)
Reset state
(11)
(2)
(1)
RUN state
(5)
(7)
Stop mode
(4)
(3)
Sleep mode
(6)
(4)
(3)
Sleep mode
(6)
MB89620 series