Fujitsu F2MC-8L MB89620 Series Hardware Manual page 340

Clock selection bit (P1) ............................................................................................................................... 144
Compare condition setting bit (SIFM) ......................................................................................................... 250
Condition code register (CCR) ..................................................................................................................... 38
Continuous activation enable bit (EXT) ...................................................................................................... 252
Conversion-in-progress flag bit (ADMV) ..................................................................................................... 250
Count clock selection bit (C0) ..................................................................................................................... 166
Count clock selection bit (C1) ..................................................................................................................... 166
Counter clear bit (TCR) .............................................................................................................................. 186
Counter operating mode selection bit (TCS0) ............................................................................................ 186
Counter operating mode selection bit (TCS1) ............................................................................................ 186
Counter operation enable bit (EN) .............................................................................................................. 164
Counter operation enable bit (TPE) ............................................................................................................ 144
Counter start bit (TCS) ............................................................................................................................... 186
E
Edge polarity selection bit 0 (SEL0) ........................................................................................................... 236
Edge polarity selection bit 1 (SEL1) ........................................................................................................... 236
Edge polarity selection bit 2 (SEL2) ........................................................................................................... 238
Edge polarity selection bit 3 (SEL3) ........................................................................................................... 238
External bus pin control register (BCTR) ................................................................................................ 81, 96
External interrupt 1 control register (EIC1) ................................................................................................. 236
External interrupt 2 control register (EIC2) ................................................................................................. 238
External interrupt request flag bit 0 (EIR0) ................................................................................................. 236
External interrupt request flag bit 1 (EIR1) ................................................................................................. 236
External interrupt request flag bit 2 (EIR2) ................................................................................................. 238
External interrupt request flag bit 3 (EIR3) ................................................................................................. 238
Extra pointer (EP) ......................................................................................................................................... 36
F
Function selection bit (ADMD) ..................................................................................................................... 252
H
Half-carry flag (H) ......................................................................................................................................... 38
Hold enable bit (HLD) ................................................................................................................................... 81
I
Index register (IX) ......................................................................................................................................... 36
Input clock selection bit (ADCK) ................................................................................................................. 252
Interrupt enable flag (I) ................................................................................................................................. 38
Interrupt level bit (IL0) ................................................................................................................................... 38
Interrupt level bit (IL1) ................................................................................................................................... 38
Interrupt level setting register (ILR1) ............................................................................................................ 45
Interrupt level setting register (ILR2) ............................................................................................................ 45
Interrupt level setting register (ILR3) ............................................................................................................ 45
Interrupt request enable bit (ADIE) ..................................................................................................... 250, 252
Interrupt request enable bit (IE) .................................................................................................................. 164
Interrupt request enable bit (SIOE) ..................................................................................................... 204, 210
Interrupt request enable bit (TBIE) ............................................................................................................. 120
Interrupt request enable bit (TCIE) ............................................................................................................. 186
318
Register Index
MB89620 series