Fujitsu F2MC-8L MB89620 Series Hardware Manual page 317

E MB89620 Series Pin States
This section describes the pin states of the MB89620 series in each mode.
n Pin States in Each Mode
Table Ea Pin States in Each Mode (Single-chip Mode)
Pin name
P00/AD0 to
P07/AD7
P10/A08 to
P17/A15
X0
X1
MOD0
MOD1
RST
P20/BUFC
P21/HAK
P22/HRQ
P23/RDY
P24/CLK
P25/WR
P26/RD
P27/ALE
P30/ADST to
P37/PTO
P40 to P47/SI2
P50/AN0 to
P57/AN7
P60/INT0 to
P63/INT0
P64
*1: Input levels are fixed to prevent leakage by leaving inputs open.
*2: The reset pin can function as an output depending on an option setting.
*3: The pins with a pull-up resistor (optional) go to the pull-up state.
Hi-z: High impedance
SPL: Pin state specification bit in the standby control register (STBC)
Hold: The pin set as output holds its state (level) immediately before changing to each mode.
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APPENDIX
Normal operation Sleep mode
Port I/O Hold
Oscillator input Oscillator input
Oscillator output Oscillator output
Mode input Mode input
Reset input Reset input
Port output Hold
Port or peripheral Hold/peripheral
I/O I/O
Port or external External interrupt
interrupt input input
Port input Hi-z *3
Stop mode Stop mode
SPL="0" SPL="1"
Hold *1,3
Hi-z
Hi-z *1 Hi-z *1
"H" output "H" output
Mode input Mode input
Reset input Reset input
Hold Hi-z
Hi-z *1,3
Hold
Hi-z *3
External interrupt External interrupt
input input
Hi-z Hi-z
* *
During a reset
*3
Hi-z
Oscillator input
Oscillator output
Mode input
Reset input *2
Hi-z
Hi-z *3
MB89620 series