Fujitsu F2MC-8L MB89620 Series Hardware Manual page 336

Register Index
<Alphabetic (Register name)>
A
A (Accumulator) ............................................................................................................................................ 36
AD (A/D converter activation bit) ................................................................................................................ 250
ADC1 (A/D Control Register 1) ................................................................................................................... 250
ADC2 (A/D Control Register 2) ................................................................................................................... 252
ADCD (A/D Data Register) ......................................................................................................................... 254
ADCK (Input clock selection bit) ................................................................................................................. 252
ADI (Interrupt request flag bit) .................................................................................................................... 250
ADIE (Interrupt request enable bit) ............................................................................................................. 252
ADMD (Function selection bit) .................................................................................................................... 252
ADMV (conversion-in-progress flag bit) ...................................................................................................... 250
ANS0 (Analog input channel selection bit) ................................................................................................. 250
ANS1 (Analog input channel selection bit) ................................................................................................. 250
ANS2 (Analog input channel selection bit) ................................................................................................. 250
ANS3 (Analog input channel selection bit) ................................................................................................. 250
B
BCTR (External bus pin control register) ...................................................................................................... 81
BCTR(External bus pin control register) ....................................................................................................... 96
BDS (Transfer direction selection bit) ................................................................................................. 204, 210
BF (Buffer full flag bit) ................................................................................................................................. 164
BUF (Buffer control enable bit) ..................................................................................................................... 81
BZ0 (Buzzer selection bit) .......................................................................................................................... 229
BZ1 (Buzzer selection bit) .......................................................................................................................... 229
BZCR (Buzzer Register) ............................................................................................................................. 229
C
C (Carry flag) ................................................................................................................................................ 38
C0 (Count clock selection bit) ..................................................................................................................... 166
C1 (Count clock selection bit) ..................................................................................................................... 166
CCR (Condition code register) ..................................................................................................................... 38
CKS0 (Shift clock selection bit) .......................................................................................................... 204, 210
CKS1 (Shift clock selection bit) .......................................................................................................... 204, 210
CLKEN (Clock output control bit) ................................................................................................................ 267
CNTR (PWM control register) ..................................................................................................................... 144
COMR (PWM compare register) ................................................................................................................ 146
D
DDR0 (Port 0 data direction register) ........................................................................................................... 92
DDR1 (Port 1 data direction register) ........................................................................................................... 92
DDR3 (Port 3 data direction register) ......................................................................................................... 100
E
EIC1 (External interrupt 1 control register) ................................................................................................. 236
EIC2 (External interrupt 2 control register) ................................................................................................. 238
EIE0 (Interrupt request enable bit 0) .......................................................................................................... 236
EIE1 (Interrupt request enable bit 1) .......................................................................................................... 236
314
Register Index
MB89620 series