Fujitsu F2MC-8L MB89620 Series Hardware Manual page 186

Table 8.3.1 PWC Pulse Width Control Register 1 (PCR1) Bits
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
MB89620 series
Bit
• For the interval timer function:
Writing "1" to this bit starts the counter counting-down from the PWC reload
buffer register (RLBR) value. Writing "0" to this bit stops the counter operation.
• For the pulse width measurement function:
EN: Writing "1" to this bit enables measurement. The counter starts counting-down
Counter operation from "FF
enable bit Writing "0" to this bit stops the counter operation.
Check: If operation is disabled (EN = "0") during measurement in pulse width
This bit specifies whether to function the P36/WTO pin as a general-purpose port
(TOE = "0") or as a dedicated pin (interval timer output) (TOE = "1").
If set as a dedicated pin, the timer output bit (PCR2: TO) value is output to the
TOE:
WTO pin.
Output pin control bit
Note: The pin functions as an output pin (WTO pin) if set as a dedicated pin in the
IE: This bit enables or disables an interrupt request output to the CPU.
Interrupt request An interrupt request is output when both this bit and one or more of the interrupt
enable bit request flag bits (UF, IR, and BF) are "1".
• The read value is indeterminate.
Unused bits
• Writing to these bits has no effect on the operation.
• This bit is set to "1" when the counter underflow (01
An interrupt request is output when both this bit and the interrupt request enable
bit (IE) are "1".
• Writing "0" clears this bit. Writing "1" has no effect and does not change the bit
value.
UF:
Notes: • When the interval timer function is active, the PWC inverts the timer
→
Underflow (01
H
00 ) interrupt request
H
flag bit
• For the pulse width measurement function:
This bit is set to "1" when the pulse width measurement is completed.
IR: An interrupt request is output when both this bit and the interrupt request enable
Measurement bit (IE) are "1".
completion interrupt • Writing "0" clears this bit. Writing "1" has no effect and does not change the bit
request flag bit value.
• For the interval timer function:
The bit has no meaning.
• For the pulse width measurement function:
This bit is an interrupt request flag and is set to "1" when a measurement value
is present in the RLBR register.
An interrupt request is output when both this bit and the interrupt request enable
bit (IE) are"1".
BF:
This bit is set to "1" when pulse width measurement completes and cleared to
Buffer full flag bit
"0" when the measurement value is read from the RLBR register.
• This bit is read-only. The write value has no meaning and has no effect on the
operation.
• For the interval timer function:
This bit has no meaning.
Function
" on detection of the specified edge on the measurement pulse.
H
measurement mode, the counter stops but the value is not transferred to
the RLBR register. Restarting operation (EN = "1") sets the counter value
to "FF " then enables operation.
H
output pin control bit (TOE = "1"), regardless of the state of the general-
purpose port (P36).
output bit (PCR2: TO) if the counter underflow (01
reload timer mode, counting-down continues from the RLBR register
value. In one-shot timer mode, the counter operation automatically
stops (EN = "0").
• If the counter underflow (01
input pulse in the pulse width measurement function, this bit is set to "1"
and counter operation continues.
CHAPTER 8 PULSE WIDTH COUNT TIMER (PWC)
→ 00
) occurs.
H H
→ 00
H H
→ 00
occurs while measuring a long
)
H H
) occur . In
s
165