Figure 8.5A Interval Timer Function (Reload Timer Mode) Settings; Figure 8.5B Operation In Reload Timer Mode; Operation Of Interval Timer Function - Fujitsu F2MC-8L MB89620 Series Hardware Manual

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8.

Operation of Interval Timer Function

This section describes the operation of the interval timer function of the pulse width
count timer.
n Operation of Interval Timer Function
The interval timer function can operate as a continuous timer (reload timer mode), or as a timer
that operates for one cycle and then stops (one-shot mode).
l Reload timer mode
Figure 8.5a shows the settings required to operate in reload timer mode.

Figure 8.5a Interval Timer Function (Reload Timer Mode) Settings

On activation, the RLBR register value is loaded to the counter and the counter starts counting-
down on the rising edge of the selected count clock. When the counter value underflows (01
00 ), the PWC inverts the timer output bit (PCR2: TO) value, reloads the RLBR register value to
H
the counter, and sets the underflow (01
the next rising edge of the count clock.
Figure 8.5b shows the operation in reload timer mode.
*: If the PWC reload buffer register (RLBR) value is modified during operation, the new value is used from the next cycle.
Note: Setting the RLBR register value to "01
170
CHAPTER 8 PULSE WIDTH COUNT TIMER (PWC)
Bit 7
PCR1 EN
1
PCR2 FC
0
RLBR
Counter value
FF
H
80
H
00
H
Timer cycle
RLBR value
(FF )
H
UF bit
EN bit
For an initial value of "0"
TOE bit
WTO pin
(TO bit)
When the output pin control bit (TOE) is "0", the pin operates as a general-purpose I/O port (P36).

Figure 8.5b Operation in Reload Timer Mode

Bit 6 Bit 5 Bit 4 Bit 3
TOE IE — —
1
RM TO — C1
0
Sets interval time (counter initial value).
→ 00
) interrupt request flag bit (PCR1: UF = "1") on
H H
RLBR value modified*
(FF
Cleared by the program
" causes the TO bit to be inverted after each count clock cycle.
H
Bit 2 Bit 1 Bit 0
UF IR BF
× ×
C0 W1 W2
× ×
Reload
→ 80
)
H H
: Used bit
× : Unused bit
1 : Set "1".
0 : Set "0".
→
H
Time
MB89620 series