Routing Recommendations; (82855Gme) Host Clock Layout Routing Example - Intel 855GME Design Manual

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Intel 855GME Chipset and Intel
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Figure 26. Intel Pentium

(82855GME) Host Clock Layout Routing Example

Secondary
Side
855GME
L3
4.1.8 Pentium

Routing Recommendations

There is one AGTL+ reference voltage pin on the Intel Pentium M/Celeron M processor, GTLREF,
which is used to set the reference voltage level for the AGTL+ signals (GTLREF). The reference
voltage must be supplied to the GTLREF pin. The voltage level that needs to be supplied to
GTLREF must be equal to 2/3 * VCCP ± 2%. The GMCH also requires a reference voltage
(MCH_GTLREF) to be supplied to its HVREF[4:0] pins. The GTLREF voltage divider for both the
Intel Pentium M/Celeron M processor and GMCH cannot be shared. Thus, both the processor and
GMCH must have their own locally generated GTLREF networks.
recommended topology for generating GTLREF for the Intel Pentium M/Celeron M processor
using a R1 = 1 kΩ ± 1% and R2 = 2 kΩ ± 1% resistive divider.
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M/Celeron M Processor and Intel
GND
Via
855GME
BCLK[1:0]
507mil on L8
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M/Celeron M Processor GTLREF Layout and
January 2007
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6300ESB ICH Embedded Platform Design Guide
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855GME Chipset GMCH
CPU
BCLK[1:0]
507mil on L8
ITP
INTERPOSER
BCLK[1:0]
507mil on L8
ITP
BCLK[1:0]
CPU
ITP
FLEX
FROM
CK - 409
Figure 27 depicts the
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