Platform Clock Routing Guidelines; System Clock Groups; Individual Clock Breakdown - Intel 855GME Design Manual

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Intel 855GME Chipset and Intel

Platform Clock Routing Guidelines

11.1

System Clock Groups

The system clocks are considered as a subsystem in themselves. At the center of this subsystem is
the clock synthesizer/driver component. Several vendors offer suitable products, as defined in the
Intel CK409 Synthesizer/Driver Specification . This device provides the set of clocks required to
implement a platform-level motherboard solution.
individual clocks.
Note: When used in Intel
and a host clock swing of 710 mV.
Table 104. Individual Clock Breakdown
Clock Group
HOST_CLK
CLK66
CLK33
PCICLK
(Expansion)
CLK14
DOTCLK
SSCCLK
USBCLK
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6300ESB ICH Embedded Platform Design Guide
®
855GME chipset platforms, the CK409 is configured in the unbuffered mode
Frequency Driver/Pin
CK409
100 MHz
CPU[2:0]
CK409
66 MHz
3V66[5:0]
CK409
33 MHz PCIF[2:0]
PCI[6:0]
CK409
33 MHz PCI[6:0]
PCIF[2:0]
CK409
14 MHz
REF0
CK409
48 MHz
48 MHz
CK409
48/66 MHz
VCH
CK409
48 MHz
48 MHz
January 2007
Platform Clock Routing Guidelines
Table 104 presents a breakdown of the various
Receiver/s
CPU
Length matched
GMCH
Differential signaling
Debug Port
GMCH
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Intel 82801DB
Length matched
I/O Controller Hub
4 (ICH4)
Length matched to CLK66
ICH4
Synchronous but not edge aligned with
SIO
CLK66
FWH
Phase delay of 1.5 ns to 3.5 ns
PCI Conn #1
Length matched to CLK33
PCI Conn #2
CLK33 length minus 2.5 inches
PCI Conn #3
ICH4
Independent clock
SIO
GMCH Independent clock
GMCH Independent clock
ICH4 Independent clock
11
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