Package Length Compensation; Trace Length Equalization Procedures - Intel 855GME Design Manual

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Intel 855GME Chipset and Intel
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Intel Pentium M/Celeron
4.1.4.1

Package Length Compensation

The Intel Pentium M/Celeron M Processor package length does not need to be accounted for in the
motherboard routing since the Intel Pentium M/Celeron M Processor has the source synchronous
signals and the strobes length matched within the group inside the package routing. However trace
length matching of the GMCH package length does need to be accounted for in the motherboard
routing because the package does not have the source synchronous signals and the strobes length
matched within the group inside the package routing. Refer to
M/Celeron M Processor and Intel 855GME chipset package lengths. Skew minimization requires
Intel 855GME chipset die-pad to Intel Pentium M/Celeron M Processor pin (pad-to-pin) trace
length matching of the Intel Pentium M/Celeron M Processor FSB source synchronous signals that
belong to the same group including the strobe signals of that group.
As mentioned briefly above, all length matching is done GMCH die-pad to Intel Pentium
M/Celeron M Processor pin. The reason for this is to compensate for the package length variation
across each signal group to minimize timing variance. The GMCH does not equalize package
lengths internally as some previous GMCH components have, and therefore, the GMCH requires a
length matching process.
Package length compensation shall not be confused with length matching as discussed in the
previous section. Length matching refers to constraints on the minimum and maximum length
bounds of a signal group based on clock length, whereas package length compensation refers to the
process of adjusting package length variance across a signal group. There is some overlap in that
both affect the target length of an individual signal. Intel recommends that the initial route be
completed based on the length matching formulas in conjunction with nominal package lengths
and that package length compensation be performed as secondary operation.
4.1.4.2

Trace Length Equalization Procedures

Figure 15
perform the trace length matching with the aid of a simple Microsoft Excel* spreadsheet or other
spreadsheet software. The layout editor used in this example is Allegro*.
1. Cell B3 in Excel is preset to calculate the Δ, which is the difference between the starting length
and reference length. This cell calculates the function B1 - B2.
2. Cell B4 calculates half of the Δ. This cell calculates the function B3/2.
3. Pre-route all the traces to approximately the same length using serpentines. The serpentines
must use the same 3:1 spacing as the rest of the routing. It is useful to make the traces 16 to 32
mils longer than needed in this stage. It is also important that there shall be no 90° angles in
the serpentines.
4. In the group of traces to be equalized, select the trace that cannot be made any shorter. Taking
A[31:17]# as an example, in
out to be A29#. Notice that there are no serpentines on this signal. Use the Allegro* I (info)
command to report the reference length of the longest trace in the group. Record the reference
length in cell B1 of Excel*.
56
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6300ESB ICH Embedded Platform Design Guide
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M Processor FSB Design and Power Delivery Guidelines
illustrates the trace length matching procedure described below. It is convenient to
Figure 14
Table 9
the longest trace that defines the reference length turns
for the Intel Pentium