Hub Interface Compensation; 8-Bit Hub Interface Decoupling Guidelines; Terminating Hi_11 If Not Used - Intel 855GME Design Manual

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Intel
855GME Chipset and Intel
8.1.5

Hub Interface Compensation

This section documents the routing guidelines for the 8-bit Hub Interface using enhanced (parallel)
termination (the method of termination is dependant upon the Northbridge). This Hub Interface
connects the Intel
6300ESB. As shown in
and the GMCH shall strap its HLRCOMP pin to V
55 Ω + 15 percent.
Table 71. Hub Interface RCOMP Resistor Values
Component
6300ESB
GMCH
8.1.6

8-Bit Hub Interface Decoupling Guidelines

To improve I/O power delivery, use two 0.1 µF capacitors per each component (i.e., the 6300ESB
and GMCH). These capacitors should be placed within 50 mils from each package, adjacent to the
rows that contain the Hub Interface. When the layout allows, wide metal fingers running on the
V
side of the board should connect the V
SS
power pins. Similarly, when the layout allows, metal fingers running on the V
the board should connect the ground side of the capacitors to the V
8.1.7

Terminating HI_11 If Not Used

The HL[11] signal exists on the 6300ESB but not the GMCH and is not used on the platform.
HL[11] must be pulled down to ground via a 56 Ω resistor.
®
6300ESB ICH Embedded Platform Design Guide
®
855GME chipset Graphics Memory Controller Hub (82855GME) to the
Table
71, the 6300ESB shall strap its HLRCOMP pin to V
Trace Impedance
HLRCOMP Resistor Value
55 Ω ± 15%
55 Ω ± 15%
CC
January 2007
HL =1.35 V. The trace impedance must equal
CC
HLRCOMP Resistor Tied to
48.1 Ω ± 1%
37.4 Ω ± 1%
HI=1.5 V side of the capacitors to the V
power pins.
SS
Hub Interface
HI = 1.5 V
CC
Vcc1_5
Vcc1_35
HI=1.5 V
CC
HI=1.5 V side of
CC
189

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