Power Supply Ps_On Consideration - Intel 855GME Design Manual

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Intel 855GME Chipset and Intel
Figure 63
delivery architecture supports the 'Instantly Available PC Design Guidelines' through the
suspend-to-RAM (STR) state. During STR, only the necessary devices are powered. These devices
include: main memory, the 6300ESB resume well, PCI-X and PCI wake devices (via 3.3 Vaux) and
USB (USB may only be powered when sufficient standby power is available). In order to ensure
that enough power is available during STR, a thorough power budget must be completed.
The power requirements must include each device's power requirements, both in suspend and in
full-power. The power requirements must be compared against the power budget supplied by the
power supply. Due to the requirements of main memory and PCI 3.3Vaux (and possibly other
devices in the system), it is necessary to create a dual power rail.
The models given in this Design Guide are only examples. There are many power distribution
methods that achieve the similar results. It is critical, when deviating from these examples in any
way, to consider the effect of the change.
In addition to the power planes provided by the ATX power supply, a 6300ESB chipset-based
system (using Suspend-to-RAM) requires seven power planes to be generated on the board.
1. 5 V: The 1.5 V plane powers the 6300ESB Hub Interface 1.5 I/O buffers, as well as other
components. For 6300ESB preliminary power requirements on this rail, see
decoupling considerations, see
page 120.
Note: This regulator is required in ALL designs.
3.3 VSB: The 3.3 VSB plane powers the I/O buffers in the resume well of the 6300ESB and the
PCI 3.3 Vaux suspend power pins. The 3.3 Vaux requirement states that during suspend, the system
must deliver 375 mA to each wake-enabled card and 20 mA to each non wake-enabled card.
During full-power operation, the system must be able to supply 375 mA to EACH card. Therefore,
the total current requirement is:
In addition to the PCI 3.3 Vaux, the 6300ESB suspend well power requirements must be
considered as shown in
Note: This regulator is required in ALL designs.
1.5VSB: A 1.5 V Standby regulator should be used to power the resume well of the 6300ESB.
4.8.5

Power Supply PS_ON Consideration

When a pulse on SLP_S3# or SLP_S5# is short enough (~ 10-100 ms) so that PS_ON is driven
active during the exponential decay of the power rails, a few power supply designs may not be
designed to handle this short pulse condition. In this case, the power supply does not respond to
this event and does not power back up. These power supplies need to have their power cords
disconnected, then reconnected to restore power to the system. Power supplies not designed to
handle this condition must have their power rails decay to a certain voltage level before they may
properly respond to PS_ON. This level varies with affected power supply.
shows the suggested power delivery architecture for the 6300ESB chipset. This power
Section 4.8.9, "Intel® 6300ESB Decoupling Recommendations" on
Full-power Operation: 375 mA * number of PCI-X and PCI slots
Suspend Operation: 375+20 * (number of PCI-X and PCI slots – 1)
Figure 63
January 2007
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6300ESB ICH Embedded Platform Design Guide
Table 26. For
119