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®
Intel
855GME Chipset and Intel
Table 133.
PCI Interface Checklist (Sheet 3 of 3)
Checklist Items
PIRQ[A:D]#
REQ#[0:3]
GNT#[0:3]
AD[0:31],C/
BE[0:3]#
IDSEL (on PCI
Connectors)
®
6300ESB ICH Embedded Platform Design Guide
Recommendations
Recommend a 2.7 K Ω pull-up
5 or 8.2 K Ω to
resistor to V
CC
V
3.3.
CC
Recommend an 8.2 K Ω pull-up
3.3 or a 2.7 K Ω pull-
resistor to V
CC
up resistor to V
5
CC
No external pull-up resistors are
required on PCI GNT signals.
However, when external pull-up
resistors are implemented they
must be pulled up to V
3.3.
CC
No extra pull-up needed
A 300 Ω to 900 Ω series resistor on
IDSEL should be connected to the
PCI AD bus,
January 2007
Schematic Checklist Summary
Interface not used
Recommend a 2.7 K Ω
pull-up resistor to V
5 or
CC
8.2 K Ω to V
3.3.
CC
Recommend an 8.2 K Ω
pull-up resistor to V
3.3
CC
or a 2.7 K Ω pull-up resistor
to V
5
CC
May leave as no connect
Recommend 8.2 K Ω pull-
up resistors to V
3.3
CC
N/A
Reason/Impact
In Non-APIC Mode,
the PIRQx# signals
may be routed to
interrupts 3, 4, 5, 6, 7,
9, 10, 11, 12, 14, or 15
as described in
Section
9.9.2.
Each PIRQx# line has
a separate Route
Control Register. (See
the 6300ESB EDS for
more information.)
In APIC mode, these
signals are connected
to the internal I/O
APIC in the following
fashion:
• PIRQ[A]# is
connected to
IRQ16
• PIRQ[B]# is
connected to
IRQ17
• PIRQ[C]# is
connected to
IRQ18
• PIRQ[D]# is
connected to
IRQ19
See PCI 2.2
Component
Specification pull-up
recommendations for
V
3.3 and V
5.
CC
CC
These signals are
actively driven by the
6300ESB.
Improves signal
quality when
connected
287
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