Intel 855GME Design Manual page 104

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Intel 855GME Chipset and Intel
Figure 48. Platform Power Delivery Map
-
ATX P/S
with 1 A Stby current
-12 V
5 VSB 12 V
5 V 3.3 V
±10%
±5%
±5%
±5% ±5%
Note: Contact your Intel sales field representative for more information on the electrical requirements for
DC-to-DC voltage regulator (IMVP-IV) for the Pentium
processor. Consult the appropriate component EDS or datasheet for complete specifications.
104
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6300ESB ICH Embedded Platform Design Guide
IMVP-IV
1.5 V
Regulator
2.5V
Regulator
2.5 V Standby
Regulator
1.5 V Standby
Regulator
3.3 V Standby
Regulator
PCI Slot (per slot)
-12 V, 5.0A
12 V,
7.6A
3.3 V, 0.5A
5 V, 0.1A
1.25 V Regulator
ADD Slot
3.3 Vaux,
3.3 Vaux,
0.375 A
0.375 A
12 V, 2.0A
3.3V,
1.5 V, 2.0 A
6.0A
5 V, 1.0A
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M Processor/Intel Celeron
®
Intel 855GME
Processor
Chipset
VccCORE
GMCH
1.1 V - 1.47 V
VccCORE
19.8 A
1.2 or 1.35 V,
VttPSB 2.24 A
2.46
1.05 V, 2.5 A
VccHI
A
1.35 V, 90 mA
VccDVO
1.5 V, 90 mA
VccDAC
1.5 V, 70 mA
VccLVDS
2.4
1.5 V, 40 mA (D)
A
1.5 V, 70 mA (A)
2.5 V, 50 mA
VccSM
2.5 V, 1.8 A
25 mA in S3
VttFSB
1.05 V, 0.69 A
Memory
VccGPIO
Vdd/Vddq
3.3 V, 20 mA
2.5 V,
138 mA in S3
®
5.92 A Intel 6300ESB
Vtt
VccCORE
1.25 V,2.1 A
1.5 V, 732 mA
0 mA in S3
VccHI
1.5 V, 99 mA
Vccsus1_5
1.5 V, 75 mA
V_CPU_IO 85mA
1.05 V, 2.5 mA
Vcc3
3.3 V, 528 mA
Vccsus3_3
3.3 V, 142 mA
S0,S1,S3,S5
CK- 409
Vcc
3.3 V, 280 mA
FWH
Vdd
3.3 V, 67 mA
LPC Super I/O
USB
Vdd
Vdd
3.3 V, 25 mA
5 V, 500 mA*6
1 mA in S3,S5
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M