Routing Illustration For Init - Intel 855GME Design Manual

®
Intel 855GME Chipset and Intel
Table 115. Connection Recommendations (Sheet 3 of 3)
Pin Name
TEST[3:1]
THERMTRIP#
VCC[72:1]
VCCA[3:0]
VCC1_05
[25:1]
VCCSENSE,
VSSSENSE
GND[192:1]
Figure 148. Routing Illustration for INIT# (for Intel
CPU
L2
®
6300ESB ICH Embedded Platform Design Guide
System Series
Pull-up/Pull-down Termination
1 K Ω pull-down to
GND
(default: no stuff)
56 Ω from
56 Ω pull-up to
pull-up to the
VCCP
6300ESB pin
Connect to
CPU_CORE
Connect to V1P8
Connect to VCCP
54.9 Ω ± 1%
pull-down to GND
(Default: no stuff)
Connect to GND
®
Intel
6300ESB
I/O
Controller
L1
L3
Rs
January 2007
Schematic Checklist Summary
Voltage
Translation
For each signal, stuffing option
for pull-down shall be provided
for testing purposes. For normal
operation, leave the resistors
unpopulated.
Point-to-point connection to an
6300ESB (THRMTRIP# signal),
with pull-up and series resistors
placed by 6300ESB.
THERMTRIP# is a VCCP signal.
When connecting to device other
than an 6300ESB, voltage
translation logic may be
required.
From Intel
specification power supply.
The Low Voltage Intel
®
Pentium
process with 2 MB L2 cache will
support a Vcca of 1.8V or 1.5V.
For each signal, stuffing option
for pull-down shall be provided
for testing purposes. Also, a test
point for differential probe
ground shall be placed between
the two resistors. For normal
operation, leave the resistors
unpopulated.
® ®
Pentium M/Celeron
3.3V
3.3V
R2
R1
Q2
3904
Q1
3904
√
Notes
®
IMVP-IV
®
M Processor on 90 nm
®
M Processor)
FWH
V_IO_FWH
L4
B3161-01
267