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®
Intel
855GME Chipset and Intel
®
Intel
6300ESB Design Guidelines
Table 89.
Bus Capacitance Reference Chart
Device
6300ESB
CK409
DIMMS/RIMMS
PCI
SMBus Trace
Length in inches
CNR
Table 90.
Bus Capacitance/Pull-Up Resistor Relationship
Physical Bus Segment
100 to 200 pF
200 to 300 pF
300 to 400 pF
9.9
PCI
The 6300ESB provides a PCI Bus interface that is compliant with the PCI Local Bus Specification,
Revision 2.2 . The implementation is optimized for high-performance data streaming when the
6300ESB is acting as either the target or the initiator on the PCI bus. For more information on the
PCI Bus interface, please refer to the PCI Local Bus Specification, Revision 2.2 .
9.9.1
PCI Routing Summary
The following represents a summary of the routing guidelines for the PCI devices. The 6300ESB
supports four PCI devices. Simulations assume that PCI cards follow the PCI Local Bus
Specification, Revision 2.2 , trace length guidelines.
Note: These routing guidelines are created using the stack-up described in
Stack-Up" on page
224
®
6300ESB ICH Embedded Platform Design Guide
# of Devices/
Trace Length
1
1
2
3
2
3
4
5
= 24
= 36
= 48
1
Pull-Up Range (For Vcc = 3.3V
Capacitance
0 to 100 pF
33.
Capacitance Includes
Pin Capacitance
Pin Capacitance
Pin Capacitance (10 pF) + 1 inch worth of trace
capacitance (2 pF/inch) per DIMM/RIMM and 2 pF
connector capacitance per DIMM/RIMM.
Each PCI add-in card is allowed up to 40 pF + 3 pF per
each connector.
2 pF per inch of trace length
Pin Capacitance (10 pF) + 6 inch worth of trace
capacitance (2 pF/inch) and 2 pF connector capacitance.
8.2K Ω to 1.2 K Ω
4.7K Ω to 1.2 K Ω
3.3K Ω to 1.2 K Ω
2.2K Ω to 1.2 K Ω
Cap (pF)
12
10
28
42
86
129
172
215
48
72
96
24
Section 3.1, "Nominal Board
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