Intel 855GME Design Manual page 243

Chipset, ich embedded platform
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®
Intel
855GME Chipset and Intel
Table 102.
GPIO Summary (Sheet 2 of 2)
GPIO Number
16
17
18
19
20
21
23
24
25
27
28
32
33
34
35
36
37
38
39
40
41
42
43
56
57
† Defaults as an Output to the 6300ESB.
®
6300ESB ICH Embedded Platform Design Guide
Power Well
Input-Output
Core
Output
Core
Output
Core
Output
Core
Output
Core
Output
Core
Output
Core
Output
Resume
Input-Output
Resume
Input-Output
Resume
Input-Output
Resume
Input-Output
Core
Input-Output
Core
Input-Output
Core
Input-Output
Core
Input-Output
Core
Input-Output
Core
Input-Output
Core
Input-Output
Core
Input-Output
Core
Input-Output
Core
Input-Output
Core
Input-Output
Core
Input-Output
RTC
Output
RTC
Output
January 2007
®
Intel
6300ESB Design Guidelines
Tolerance
3.3 V
3.3 V
5 V
5 V
5 V
5 V
5 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
If Not Used
May leave as no
connect
May leave as no
connect
243

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