Intel 855GME Design Manual page 319

®
Intel 855GME Chipset and Intel
Schematics
The following schematics of the Intel
•
Cover Page
•
TABLES: Block Diagram
•
TABLES: Reset Map
•
TABLES: Clock Distribution
•
TABLES: GPIO/IDSEL Mapping
•
TABLES: Voltage Distribution
•
CORE: CK_409 (Main Clock Generation)
•
CORE: CPU Connector, 1 of 2
•
CORE: CPU Connector, 2 of 2
•
CORE: CPU Pull-Ups, PLL Circuitry, TJPRO Connector
•
CORE: GMCH
•
CORE: GMCH Circuitry
•
CORE: GMCH PLL, Straps, LVDS Clock Generation
•
CORE: DDR Series Termination
•
CORE: DIMM Connectors
•
CORE: DDR Parallel Termination (Strobes, CNTRL)
•
CORE: DDR Vterm Caps
•
CORE: AGP Digital Display Connector
•
CORE: VGA Connector
•
ICH: 6300ESB
•
ICH: ICH Pull-up/Pull-downs
•
CORE: LVDS
•
ICH: IDE Primary and Secondary
•
ICH: USB Back Panel Connectors
•
ICH: USB Front Panel VREG and OC#
•
ICH: PCI Slots 3 - 1
•
ICH: PCI Pull-ups
•
SMBUS Isolation
•
LAN: 82562EM
•
AUDIO: Codec (AD1885 or CS4201)
•
AUDIO: Codec Filtering Caps
®
6300ESB ICH Embedded Platform Design Guide
®
855GME chipset are included in this section.
January 2007
Schematics
A
319