Texas Instruments MSP430x1xx User Manual page 60

Texas instruments modules and peripherals user's guide
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Instruction Set
AND[.W]
Source AND destination
AND.B
Source AND destination
Syntax
AND
AND.B
Operation
src .AND. dst −> dst
Description
The source operand and the destination operand are logically ANDed. The
result is placed into the destination.
Status Bits
N: Set if result MSB is set, reset if not set
Z: Set if result is zero, reset otherwise
C: Set if result is not zero, reset otherwise ( = .NOT. Zero)
V: Reset
Mode Bits
OSCOFF, CPUOFF, and GIE are not affected.
Example
The bits set in R5 are used as a mask (#0AA55h) for the word addressed by
TOM. If the result is zero, a branch is taken to label TONI.
MOV
AND
JZ
......
;
;
;
;
;
AND
JZ
Example
The bits of mask #0A5h are logically ANDed with the low byte TOM. If the result
is zero, a branch is taken to label TONI.
AND.B
JZ
......
RISC 16−Bit CPU
3-24
src,dst
or AND.W src,dst
src,dst
#0AA55h,R5
; Load mask into register R5
R5,TOM
; mask word addressed by TOM with R5
TONI
;
; Result is not zero
or
#0AA55h,TOM
TONI
#0A5h,TOM
; mask Lowbyte TOM with 0A5h
TONI
;
; Result is not zero

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