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Watchdog Timer Registers
WDTCTL, Watchdog Timer Register
15
14
7
6
WDTHOLD
WDTNMIES
rw−0
rw−0
WDTPW
Bits
Watchdog timer password. Always read as 069h. Must be written as 05Ah, or
15-8
a PUC will be generated.
WDTHOLD
Bit 7
Watchdog timer hold. This bit stops the watchdog timer. Setting WDTHOLD
= 1 when the WDT is not in use conserves power.
0
1
WDTNMIES
Bit 6
Watchdog timer NMI edge select. This bit selects the interrupt edge for the
NMI interrupt when WDTNMI = 1. Modifying this bit can trigger an NMI. Modify
this bit when WDTNMI = 0 to avoid triggering an accidental NMI.
0
1
WDTNMI
Bit 5
Watchdog timer NMI select. This bit selects the function for the RST/NMI pin.
0
1
WDTTMSEL
Bit 4
Watchdog timer mode select
0
1
WDTCNTCL
Bit 3
Watchdog timer counter clear. Setting WDTCNTCL = 1 clears the count value
to 0000h. WDTCNTCL is automatically reset.
0
1
WDTSSEL
Bit 2
Watchdog timer clock source select
0
1
WDTISx
Bits
Watchdog timer interval select. These bits select the watchdog timer interval
1-0
to set the WDTIFG flag and/or generate a PUC.
00
01
10
11
10-8
Watchdog Timer
13
12
Read as 069h
WDTPW, must be written as 05Ah
5
4
WDTNMI
WDTTMSEL
WDTCNTCL
rw−0
rw−0
r0(w)
Watchdog timer is not stopped
Watchdog timer is stopped
NMI on rising edge
NMI on falling edge
Reset function
NMI function
Watchdog mode
Interval timer mode
No action
WDTCNT = 0000h
SMCLK
ACLK
Watchdog clock source /32768
Watchdog clock source /8192
Watchdog clock source /512
Watchdog clock source /64
11
10
9
3
2
1
WDTSSEL
rw−0
rw−0
8
0
WDTISx
rw−0
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