Texas Instruments MSP430x1xx User Manual page 171

Figure 8−1. DMA Controller Block Diagram
DMA0TSELx
DMAREQ 0000
TACCR2_CCIFG 0001
TBCCR2_CCIFG 0010
USART0 data received 0011
USART0 transmit ready 0100
DAC12_0IFG 0101
ADC12IFGx 0110
TACCR0_CCIFG 0111
TBCCR0_CCIFG 1000
USART1 data received 1001
USART1 transmit ready 1010
Multiplier ready 1011
No trigger
−−−
No trigger
DMA2IFG 1110
DMAE0 1111
DMA1TSELx
DMAREQ 0000
TACCR2_CCIFG 0001
TBCCR2_CCIFG 0010
USART0 data received 0011
USART0 transmit ready 0100
DAC12_0IFG 0101
0110
ADC12IFGx
0111
TACCR0_CCIFG
1000
TBCCR0_CCIFG
USART1 data received 1001
USART1 transmit ready 1010
Multiplier ready 1011
No trigger
−−−
No trigger
DMA0IFG 1110
DMAE0 1111
DMA2TSELx
DMAREQ 0000
TACCR2_CCIFG 0001
TBCCR2_CCIFG 0010
USART0 data received 0011
USART0 transmit ready 0100
DAC12_0IFG 0101
ADC12IFGx 0110
0111
TACCR0_CCIFG
1000
TBCCR0_CCIFG
USART1 data received 1001
USART1 transmit ready 1010
Multiplier ready 1011
No trigger
−−−
No trigger
DMA1IFG 1110
DMAE0 1111
4
Halt
ROUNDROBIN
DMADSTINCRx
DMADSTBYTE
2
DMA Channel 0
DMA0SA
DMA0DA
DMA0SZ
2
DMASRSBYTE
DMASRCINCRx
4
DMADSTINCRx
DMADSTBYTE
2
DMA Channel 1
DMA1SA
DMA1DA
DMA1SZ
2
DMASRSBYTE
DMASRCINCRx
DMADSTINCRx
DMADSTBYTE
4 2
DMA Channel 2
DMA2SA
DMA2DA
DMA2SZ
2
DMASRSBYTE
DMASRCINCRx
DMAONFETCH
Halt CPU
JTAG Active
NMI Interrupt Request
ENNMI
DMADTx
3
DT
DMAEN
DMADTx
3
DT
Address
DMAEN
DMADTx
3
DT
DMAEN
Space
8-3