Texas Instruments MSP430x1xx User Manual page 403

Figure 18−10. State Diagram for Data Transfer Control in One-Block Transfer Mode
n = 0
Write to ADC10SA
or
n = 0
Write to ADC10SA
Write to ADC10SA
n=0 (ADC10DTC1)
DTC reset
n ≠ 0
Wait for write to
ADC10SA
Initialize
DTC init
Start Address in ADC10SA
Write to
ADC10SA
x = n
n is latched
AD = SA
in counter 'x'
Wait until ADC10MEM
is written
DTC idle
Write to ADC10MEM
completed
Wait
Synchronize
for
with MCLK
CPU ready
1 x MCLK cycle
Transfer data to
Address AD
AD = AD + 2
x = x − 1
ADC10TB = 0
and
ADC10CT = 1
x = 0
ADC10TB = 0
ADC10IFG=1
ADC10CT = 0
Prepare
DTC
x > 0
DTC
operation
and
ADC10
ADC10 Operation
18-17