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USART Registers: UART Mode
UxRXBUF, USART Receive Buffer Register
7
6
2 7
2 6
r
r
UxRXBUFx
Bits
The receive-data buffer is user accessible and contains the last received
7−0
character from the receive shift register. Reading UxRXBUF resets the
receive-error bits, the RXWAKE bit, and URXIFGx. In 7-bit data mode,
UxRXBUF is LSB justified and the MSB is always reset.
UxTXBUF, USART Transmit Buffer Register
7
6
2 7
2 6
rw
rw
UxTXBUFx
Bits
The transmit data buffer is user accessible and holds the data waiting to be
7−0
moved into the transmit shift register and transmitted on UTXDx. Writing to
the transmit data buffer clears UTXIFGx. The MSB of UxTXBUF is not
used for 7-bit data and is reset.
13-26
USART Peripheral Interface, UART Mode
5
4
3
2 5
2 4
2 3
r
r
r
5
4
3
2 5
2 4
2 3
rw
rw
rw
2
1
0
2 2
2 1
2 0
r
r
r
2
1
0
2 2
2 1
2 0
rw
rw
rw
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