Texas Instruments MSP430x1xx User Manual page 258

Timer_B Registers
CCIE Bit 4 Capture/compare interrupt enable. This bit enables the interrupt request of
the corresponding CCIFG flag.
0
1
CCI Bit 3 Capture/compare input. The selected input signal can be read by this bit.
OUT Bit 2 Output. For output mode 0, this bit directly controls the state of the output.
0
1
COV Bit 1 Capture overflow. This bit indicates a capture overflow occurred. COV must
be reset with software.
0
1
CCIFG Bit 0 Capture/compare interrupt flag
0
1
12-24
Timer_B
Interrupt disabled
Interrupt enabled
Output low
Output high
No capture overflow occurred
Capture overflow occurred
No interrupt pending
Interrupt pending