Texas Instruments MSP430x1xx User Manual page 253

TBIV, Interrupt Handler Examples
The following software example shows the recommended use of TBIV and the
handling overhead. The TBIV value is added to the PC to automatically jump
to the appropriate routine.
The numbers at the right margin show the necessary CPU clock cycles for
each instruction. The software overhead for different interrupt sources
includes interrupt latency and return-from-interrupt cycles, but not the task
handling itself. The latencies are:
-
-
-
The following software example shows the recommended use of TBIV for
Timer_B3.
; Interrupt handler for TBCCR0 CCIFG.
CCIFG_0_HND
; Interrupt handler for TBIFG, TBCCR1 and TBCCR2 CCIFG.
TB_HND
TBIFG_HND
CCIFG_2_HND
; The Module 1 handler shows a way to look if any other
; interrupt is pending: 5 cycles have to be spent, but
; 9 cycles may be saved if another interrupt is pending
CCIFG_1_HND
Capture/compare block CCR0
Capture/compare blocks CCR1 to CCR6
Timer overflow TBIFG
... ; Start of handler Interrupt latency
RETI
...
ADD &TBIV,PC
RETI
JMP CCIFG_1_HND ; Vector
JMP CCIFG_2_HND ; Vector
RETI
RETI
RETI
RETI
...
RETI
...
RETI
...
JMP TB_HND
Timer_B Operation
11 cycles
16 cycles
14 cycles
; Interrupt latency
; Add offset to Jump table
; Vector 0: No interrupt
2: Module 1
4: Module 2
; Vector 6
; Vector 8
; Vector 10
; Vector 12
; Vector 14: TIMOV Flag
; Task starts here
; Vector 4: Module 2
; Task starts here
; Back to main program
; Vector 6: Module 3
; Task starts here
; Look for pending ints
Timer_B
Cycles
6
5
6
3
5
2
2
5
5
2
12-19