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CCIE
Bit 4
Capture/compare interrupt enable. This bit enables the interrupt request of
the corresponding CCIFG flag.
0
1
CCI
Bit 3
Capture/compare input. The selected input signal can be read by this bit.
OUT
Bit 2
Output. For output mode 0, this bit directly controls the state of the output.
0
1
COV
Bit 1
Capture overflow. This bit indicates a capture overflow occurred. COV must
be reset with software.
0
1
CCIFG
Bit 0
Capture/compare interrupt flag
0
1
TAIV, Timer_A Interrupt Vector Register
15
14
0
0
r0
r0
7
6
0
0
r0
r0
Bits
Timer_A Interrupt Vector value
TAIVx
15-0
Interrupt disabled
Interrupt enabled
Output low
Output high
No capture overflow occurred
Capture overflow occurred
No interrupt pending
Interrupt pending
13
12
0
0
r0
r0
5
4
0
0
r0
r0
TAIV Contents
Interrupt Source
00h
No interrupt pending
02h
Capture/compare 1
04h
Capture/compare 2
06h
Reserved
08h
Reserved
0Ah
Timer overflow
0Ch
Reserved
0Eh
Reserved
11
10
9
0
0
0
r0
r0
r0
3
2
1
TAIVx
r−(0)
r−(0)
r−(0)
Interrupt Flag
−
TACCR1 CCIFG
TACCR2 CCIFG
−
−
TAIFG
−
−
Timer_A Registers
8
0
r0
0
0
r0
Interrupt
Priority
Highest
Lowest
Timer_A
11-23
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