Texas Instruments MSP430x1xx User Manual page 303

USART Operation: SPI Mode
SPI Receive Interrupt Operation
The URXIFGx interrupt flag is set each time a character is received and loaded
into UxRXBUF as shown in Figure 14−11 and Figure 14−12. An interrupt
request is generated if URXIEx and GIE are also set. URXIFGx and URXIEx
are reset by a system reset PUC signal or when SWRST = 1. URXIFGx is
automatically reset if the pending interrupt is served or when UxRXBUF is
read.
Figure 14−11.Receive Interrupt Operation
SYNC
Valid Start Bit
Receiver Collects Character
URXSE
τ
From URXD
PE
FE
BRK
URXEIE
URXWIE
RXWAKE
Figure 14−12. Receive Interrupt State Diagram
SWRST = 1
Wait For Next
Start
Receive
Character
USPIEx = 0
Receive
Character
Completed
14-12
USART Peripheral Interface, SPI Mode
Character Received
URXIFGx = 0
URXIEx = 0
SWRST = 1
PUC
USPIEx = 1
URXIFGx = 1
Priority
Low
URXS
Clear
URXIEx
(S)
URXIFGx
Clear
USPIEx = 0
USPIEx = 1 and
URXIEx = 1 and
GIE = 1 and
Priority Valid
GIE = 0
Too
SYNC = 1
Interrupt Service
Requested
SWRST
PUC
UxRXBUF Read
URXSE
IRQA
Interrupt
Service Started,
GIE = 0
URXIFGx = 0