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Timer_A Operation
Figure 11−11. Capture Cycle
Clear Bit COV
in Register TACCTLx
Capture Initiated by Software
Captures can be initiated by software. The CMx bits can be set for capture on
both edges. Software then sets CCIS1 = 1 and toggles bit CCIS0 to switch the
capture signal between V
changes state:
Compare Mode
The compare mode is selected when CAP = 0. The compare mode is used to
generate PWM output signals or interrupts at specific time intervals. When
TAR counts to the value in a TACCRx:
-
-
-
-
11-12
Timer_A
Capture
No
Capture
Taken
CC
MOV
#CAP+SCS+CCIS1+CM_3,&TACCTLx ; Setup TACCTLx
XOR
#CCIS0,&TACCTLx
Interrupt flag CCIFG is set
Internal signal EQUx = 1
EQUx affects the output according to the output mode
The input signal CCI is latched into SCCI
Idle
Capture Read
Capture
Taken
Capture
Capture Read and No Capture
Capture
Second
Capture
Idle
Taken
COV = 1
and GND, initiating a capture each time CCIS0
; TACCTLx = TAR
Read
Taken
Capture
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