Texas Instruments MSP430x1xx User Manual page 328

2
I C Module Operation
Figure 15−12. Slave Receiver
No
START
Detected?
2
STTIFG Is Set
I2CBUSY Is Set
4 x I2CPSC
I2CBB Is Set
XA = 1
8 x SCL 8 x SCL
Receive Slave
Address Bits 9−8
with R/W = 0
No
Match
Matched I2COA
1 x SCL
Send
Acknowledge
8 x SCL
Match
Receive Slave
Address Bits 7−0
Matched I2COA
1 x SCL
Send
Acknowledge
15-14
USART Peripheral Interface, I
IDLE
Yes
Yes
XA = 0
Receive Slave
Address Bits 6−0
with R/W = 0
No
Match
2
Matched I2COA
1 x SCL
Send
Acknowledge
No
OAIFG Set If Not
RESTART
2
C Mode
RESTART
Detected ?
Transmit Mode
No
8 x SCL
Receive Data
Low Byte
From Master
1 x SCL
Send
Acknowledge
8 x SCL
Receive Data
High Byte
From Master
1 x SCL
Send
Acknowledge
Stop State?
Yes
4 x I2CPSC
I2CBB Is Cleared
1 x I2CPSC
I2CBUSY Is
Cleared
IDLE
From Slave
1
No
I2CWORD=0
Byte Mode