Texas Instruments MSP430x1xx User Manual page 191

DMAxDA, DMA Destination Address Register
15 14
rw rw
7 6
rw rw
DMAxDAx Bits DMA destination address. The destination address register points to the
15−0 destination address for single transfers or the first address for block transfers.
The DMAxDA register remains unchanged during block and burst-block
transfers.
DMAxSZ, DMA Size Address Register
15 14
rw rw
7 6
rw rw
DMAxSZx Bits DMA size. The DMA size register defines the number of byte/word data per
15−0 block transfer. DMAxSZ register decrements with each word or byte transfer.
When DMAxSZ decrements to 0, it is immediately and automatically reloaded
with its previously initialized value.
00000h Transfer is disabled
00001h One byte or word is transferred
00002h Two bytes or words are transferred
:
0FFFFh 65535 bytes or words are transferred
13 12 11
DMAxDAx
rw rw rw
5 4 3
DMAxDAx
rw rw rw
13 12 11
DMAxSZx
rw rw rw
5 4 3
DMAxSZx
rw rw rw
10 9 8
rw rw rw
2 1 0
rw rw rw
10 9 8
rw rw rw
2 1 0
rw rw rw
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