A.3 Ldpc And Bch - Comtech EF Data CDM-710 Installation And Operation Manual

CDM-710/L Broadcast Satellite Modem MN/CDM710.IOM
Appendix A Revision 12
clusters or errors bursts. The Reed Solomon decoder works well correcting burst
errors so the combination delivers improved performance. To further improve
the error correcting capability, an interleaver is placed between the two schemes
to spread the errors so fewer occur in a given block.
A.3 LDPC and BCH
LDPC and BCH is also a concatenation technique. LDPC is a very powerful coding
scheme with significant, Near-Shannon Bound Performance. In some cases, as
the carrier-to-noise ratio increases, the LDPC error correction starts flaring
toward an error floor so BCH error correction follows LDPC and eliminates the
flare for any practical range of error rates.
LDPC also functions differently than Viterbi decoding by using iterative decoding.
In this process the data initially corrected by the LDPC decoder is re-encoded and
run through the decoder again to correct additional errors. Key to this is the soft
decision output from the LDPC decoder and a high-speed processor operating at
a rate much higher than the data rate. The LDPC decoder runs the iterative
process as many times as possible before corrected data is finally outputted to
make way for a new block of data entering the decoder. LDPC also uses
interleaving to spread the errors. In contrast, Viterbi error correction operates by
passing data through the convolutional error correction process a single time.
The error correcting capability of LDPC is improved by using large block sizes. This
also increases latency. However, in one-way broadcast applications this is not a
drawback. Links with LDPC normally operate at multi-megabit data rates where
latency effects are reduced. The standard block size for LDPC is 64,800 bits, and
for lower data rate applications there is a short frame block at 16,800 bits that
suffers only a small error correcting loss (0.2 to 0.3 dB) compared to the standard
block.
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