Pulse Outputs - Omron CP1L-EL20DR-D Operation Manual

Specifications
Item
Fuse None
Circuit configuration • Normal outputs CIO 100.00 to CIO 100.03
(Sinking Outputs)
• Normal outputs CIO 100.00 to CIO 100.03
(Sourcing Outputs)
Note
!Caution Do not connect a load to an output terminal or apply a voltage in excess of the
Pulse Outputs (CIO 100.00 to CIO 100.03)
Note
CIO 100.00 to CIO 100.03
Internal Internal
circuits circuits
Internal Internal
circuits circuits
The bits that can be used depend on the model of the CPU Unit.
maximum switching capacity.
Item
Max. switching capacity
Min. switching capacity
Max. output frequency
Output waveform
(1) The load for the above values is assumed to be the resistance load, and
does not take into account the impedance for the connecting cable to the
load.
(2) Due to distortions in pulse waveforms resulting from connecting cable im-
pedance, the pulse widths in actual operation may be smaller than the
values shown above.
Specification
CIO 100.04 to CIO 101.07 (See note.)
• Normal outputs CIO 100.04 to CIO 101.07
(Sinking Outputs)
V+
V-
Internal
OUT
circuits
L
OUT
L
24 VDC/
20.4 to
26.4 VDC
COM (V-)
• Normal outputs CIO 100.04 to CIO 101.07
(Sourcing Outputs)
V+
V-
Internal
circuits
COM (V+)
24 VDC/
20.4 to
OUT
L
26.4 VDC
OUT
L
30 mA/4.75 to 26.4 VDC
7 mA/4.75 to 26.4 VDC
100 kHz
OFF
90%
10%
ON
4 μs min.
The OFF and ON refer to the output transistor. The output
transistor is ON at level "L".
Section 2-2
OUT
L
OUT
L
24 VDC/4.5
to 30 VDC
COM (−)
COM (+)
24 VDC/4.5
to 30 VDC
OUT
L
OUT
L
Specification
2 μs min.
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