Omron CP1L-EL20DR-D Operation Manual page 759

Auxiliary Area Allocations by Address
Addresses Name
Word Bits
A526 00 Serial Port 2
Restart Bit
(CP1L EM-
type CPU
Units)
Serial Port 1
Restart Bit
(CP1L EL-
type CPU
Units)
01 Serial Port 1
Restart Bit
(CP1L EM-
type CPU
Units)
A527 00 to 07 Online Edit-
ing Disable
Bit Validator
09 Online Edit-
ing Disable
Bit
A528 00 to 07 Serial Port 2
Error Flags
(CP1L EM-
type CPU
Units)
Serial Port 1
Error Flags
(CP1L EL-
type CPU
Units)
Function
Turn this bit ON to restart the serial
port 2 of a CP1L EM-type CPU Unit.
(Do not use this bit when the port is
operating in Peripheral Bus Mode.)
Note This bit is turned OFF auto-
matically when the restart
processing is completed.
Turn this bit ON to restart the serial
port 1 of a CP1L EL-type CPU Unit.
(Do not use this bit when the port is
operating in Peripheral Bus Mode.)
Note This bit is turned OFF auto-
matically when the restart
processing is completed.
Turn this bit ON to restart the serial
port 1 of a CP1L EM-type CPU Unit.
Note This bit is turned OFF auto-
matically when the restart
processing is completed.
The Online Editing Disable Bit
(A527.09) is valid only when this byte
contains 5A.
To disable online editing from the
CX-Programmer, set this byte to 5A
and turn ON A527.09.
(Online editing refers to changing or
adding to the program while the PLC
is operating in MONITOR mode.)
Turn this bit ON to disable online
editing. The setting of this bit is valid
only when A527.00 to A527.07 have
been set to 5A.
These flags indicate what kind of
error has occurred at the serial port 2
of a CP1L EM-type CPU Unit; they
are automatically turned OFF when
the serial port 2 is restarted.
(These flags are not valid in periph-
eral bus mode and only bit 5 is valid
in NT Link mode.)
PLC Link Polling Unit:
Bit 05: ON for timeout error.
PLC Link Polled Unit:
Bit 03: ON for framing error.
Bit 04: ON for overrun error.
Bit 05: ON for timeout error.
These bits can be cleared by the CX-
Programmer.
These flags indicate what kind of
error has occurred at the serial port 1
of a CP1L EL-type CPU Unit; they
are automatically turned OFF when
the serial port 1 is restarted.
(These flags are not valid in periph-
eral bus mode and only bit 5 is valid
in NT Link mode.)
PLC Link Polling Unit:
Bit 05: ON for timeout error.
PLC Link Polled Unit:
Bit 03: ON for framing error.
Bit 04: ON for overrun error.
Bit 05: ON for timeout error.
These bits can be cleared by the CX-
Programmer.
Settings Status Status at
after startup
mode
change
OFF to ON: Retained Cleared
Restart
0 to ON: Retained Cleared
Restart
5A: A527.09 Retained Cleared
enabled
Other value:
A527.09 dis-
abled
ON: Disabled Retained Cleared
OFF: Not dis-
abled
Bits 00 and 01: Retained Cleared
Not used.
Bit 02: ON for
parity error.
Bit 03: ON for
framing error.
Bit 04: ON for
overrun error.
Bit 05: ON for
timeout error.
Bits 06 and 07:
Not used.
Appendix D
Write Related
timing Flags,
Settings
--- ---
--- ---
--- A527.09
--- A527.00
to
A527.07
--- ---
725