Clearing And Holding I/O Memory; Counter Pvs - Omron CP1L-EL20DR-D Operation Manual

Overview of I/O Memory Area
Condition Flags
Clock Pulses
Task Flag Area (TK)
Index Registers (IR)
Data Registers (DR)
4-1-3

Clearing and Holding I/O Memory

Area
CIO I/O Area
Area
Serial PC Link Area
Internal I/O Area
Work Area (W)
Holding Area (H)
Auxiliary Area (A)
Data Memory Area (D)
Timer Completion Flags (T)
Timer PVs (T)
Counter Completion Flags (C)
Counter PVs (C)
Task Flags (TK)
Index Registers (IR)
Data Registers (DR)
Note
108

Counter PVs

The PVs are read and written as words (16 bits). The PVs count up or down
as the counter operates.
These flags include the Arithmetic Flags, such as the Error Flag and Equals
Flag, which indicate the results of instruction execution as well as the Always
ON and Always OFF Flags. The Condition Flags are specified with symbols
rather than addresses.
The Clock Pulses are turned ON and OFF by the CPU Unit's internal timer.
These bits are specified with symbols rather than addresses.
A Task Flag will be ON when the corresponding cyclic task is in executable
(RUN) status and OFF when the cyclic task hasn't been executed (INI) or is in
standby (WAIT) status.
Index registers (IR0 to IR15) are used to store PLC memory addresses (i.e.,
absolute memory addresses in RAM) to indirectly address words in I/O mem-
ory. The Index Registers can be used separately in each task or they can be
shared by all tasks.
Data registers (DR0 to DR15) are used together with Index Registers. When a
Data Register is input just before an Index Register, the content of the Data
Register is added to the PLC memory address in the Index Register to offset
that address. The Data Registers can be used separately in each task or they
can be shared by all tasks.
1
Mode changed
Execution of FALS
IOM Hold IOM Hold IOM Hold
Bit OFF Bit ON Bit OFF
Cleared Retained Retained
Cleared Retained Retained
Retained Retained Retained
Status treatment depends on address.
Retained Retained Retained
Cleared Retained Retained
Cleared Retained Retained
Retained Retained Retained
Retained Retained Retained
Cleared Cleared Retained
Cleared Retained Retained
Cleared Retained Retained
1. Mode changed from PROGRAM to RUN/MONITOR or vice-versa.
2. The PLC Setup's IOM Hold Bit Status at Startup setting determines wheth-
er the IOM Hold Bit's status is held or cleared when the PLC is turned ON.
Fatal error generated
Other fatal errors
IOM Hold IOM Hold IOM Hold
Bit ON Bit OFF Bit ON
Retained Cleared Retained
Retained Cleared Retained
Retained Retained Retained
Retained Retained Retained
Retained Cleared Retained
Retained Cleared Retained
Retained Retained Retained
Retained Retained Retained
Retained Cleared Cleared
Retained Cleared Retained
Retained Cleared Retained
Section 4-1
PLC power turned ON
PLC Setup set to PLC Setup set to
clear IOM Hold Bit hold IOM Hold Bit
2
status status
IOM Hold IOM Hold IOM Hold
Bit OFF Bit ON Bit OFF
Cleared Cleared Cleared
Cleared Cleared Cleared
Retained Retained Retained
Retained Retained Retained
Cleared Cleared Cleared
Cleared Cleared Cleared
Retained Retained Retained
Retained Retained Retained
Cleared Cleared Cleared
Cleared Cleared Cleared
Cleared Cleared Cleared
2
IOM Hold
Bit ON
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Retained
Cleared
Retained
Retained