Omron CP1L-EL20DR-D Operation Manual page 425

Sysmac cp series cp1l-el/em cpu unit
Table of Contents

Advertisement

Interrupt Functions
Address
Word
Bit
CPU Units
with 40 I/O
Points
CIO 0
00
Normal
input 0
01
Normal
input 1
02
Normal
input 2
03
Normal
input 3
04
Normal
input 4
05
Normal
input 5
06
Normal
input 6
07
Normal
input 7
08
Normal
input 8
09
Normal
input 9
10
Normal
input 10
11
Normal
input 11
CIO 1
00 to
Normal
05
input 12 to
17
06 to
Normal
11
input 18 to
23
■ CPU Units with 20, 30 or 40 I/O Points
Default setting
CPU Units
CPU Units
with 30 I/O
with 20 I/O
Points
Points
Normal
Normal
input 0
input 0
Normal
Normal
input 1
input 1
Normal
Normal
input 2
input 2
Normal
Normal
input 3
input 3
Normal
Normal
input 4
input 4
Normal
Normal
input 5
input 5
Normal
Normal
input 6
input 6
Normal
Normal
input 7
input 7
Normal
Normal
input 8
input 8
Normal
Normal
input 9
input 9
Normal
Normal
input 10
input 10
Normal
Normal
input 11
input 11
Normal
---
input 12 to
17
---
---
High-speed counter operation settings:
Single-phase
(increment pulse
(differential phases
input)
x4, up/down, or
pulse/direction)
Counter 0,
Counter 0, A phase,
increment input
up, or count input
Counter 1,
Counter 0, B phase,
increment input
down, or direction
input
Counter 2,
Counter 1, A phase,
increment input
up, or count input
Counter 3,
Counter 1, B phase,
increment input
down, or direction
input
Counter 0,
Counter 0, phase-Z
phase-Z reset input
reset input
Counter 1,
Counter 1, phase-Z
phase-Z reset input
reset input
Counter 2,
---
phase-Z reset input
Counter 3,
---
phase-Z reset input
---
---
---
---
---
---
---
---
---
---
---
---
Section 8-1
Two-phase
Origin searches
---
---
---
---
---
---
Pulse output 0:
Origin input sig-
nal
Pulse output 1:
Origin input sig-
nal
---
---
Pulse output 0:
Origin proximity
input signal
Pulse output 1:
Origin proximity
input signal
---
---
391

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents