Memory Allocations - Built-In Input Area; Built-In Output Area; 7-3-10 Memory Allocations - Omron CP1L-EL20DR-D Operation Manual

Inverter Positioning

7-3-10 Memory Allocations

Built-in Input Area
Input terminal block
Word Bit
CIO 0 00
(See note.)
01
02
03
04
05
06
07
08
09
10
11
Note

Built-in Output Area

Default Pulse output origin searches enabled
Normal inputs
Normal input 0 ---
Normal input 1 ---
Normal input 2 ---
Normal input 3 ---
Normal input 4 ---
Normal input 5 ---
Normal input 6 Pulse output 0: Origin input signal
Normal input 7 Pulse output 1: Origin input signal
Normal input 8 ---
Normal input 9 ---
Normal input 10 Pulse output 0: Origin proximity input signal
Normal input 11 Pulse output 1: Origin proximity input signal
The above table shows only allocations related to inverter positioning.
This area is not used for inverter positioning.
When inverter positioning is enabled, bits 00 to 03 in CIO 100 can be used as
normal outputs 0 to 3. The corresponding pulse output and PWM output can-
not be used.
Origin search
Section 7-3
Inverter positioning
enabled
High-speed counter 0:
Phase A
High-speed counter 0:
Phase B
High-speed counter 1:
Phase A
High-speed counter 1:
Phase B
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