Intel Xeon Design Manual page 304

8 7
D
SPARE GATES
+V3_3
14
U72
9 8
74LVC14
7
C
U113
9 8
+VSBY5_0;14
GND;7
U113
11 10
+VSBY5_0;14
GND;7
B
A
8 7
6 5
MH9
MH2
FIDUCIAL MARK
FIDUCIAL MARK
FIDUCIAL MARK
FIDUCIAL MARK
6 5
4 3
Mounting Holes
MH8 MH7
MH1 MH11
Fiducial marks
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
FID1 FID2 FID3 FID4 FID5 FID6
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
FID11 FID12 FID14 FID13 FID16 FID15
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
FID21 FID22 FID24 FID23 FID26 FID25
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
FID31 FID32 FID34 FID33 FID36 FID35
4 3
2
MH6 MH5 MH3
MH10 MH4
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
FID7 FID8 FID9 FID10
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
FID18 FID17 FID20 FID19
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
FID28 FID27 FID30 FID29
FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK FIDUCIAL MARK
FID38 FID37 FID40 FID39
TITLE:
INTEL(R) E7500 CHIPSET CUSTOMER REFERENCE SCHEMATICS
Platform Apps Engineering
R
1900 Prairie City Road
LAST REVISED:
Folsom, California 095630
2
1
D
C
B
A
SHEET
82
03/04/02
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