Reference Schematic For Dual-Slot Parallel Mode - Intel Xeon Design Manual

8.2.6.9

Reference Schematic for Dual-Slot Parallel Mode

Note that the following schematics are based on definition and simulation of the P64H2. These
schematics have not been fully validated.
Figure 8-14. Reference Schematic for Dual-Slot Parallel Mode
PxPCLK O [0]
PxPCLK O [1]
PxPCLK O [6]
PxP CLKI
PxA D[63:0]
P64H2
P xC/BE [7:0]
PxPA R
PxPA R6 4
PxREQ 64#
PxA CK 64#
P xFRA ME #
PxIRDY#
PxM 66E N needs to
be routed to eac h
PxTRDY#
PCI Slot by m ea ns
PxSTO P#
of a bus sw itch so
PxDEVS EL#
that the P6 4H2 c an
P xPLO CK #
drive this s ignal
w hen appropriate
PxP ERR#
PxS ERR#
PxM 66E N
PxREQ [0 ]#
PxRE Q[2 ]#
PxREQ [1 ]#
sho uld b e p ulled
to 3.3 V thro ugh
PxG NT[0]#
8.2K
PxG NT[1]#
P xGNT[5 ]# (HxRESE TA#)
HPxS OD (HxPW RENA)
PxIRQ [14 ] (HxFAULTA#)
PxIRQ[12] (HxP RS NT1 A)
P xIRQ [13] (HxPRSNT2A)
PxIRQ [1 1] (HxM 66ENA)
HPxS LOT[2] (HXPCIXCAP1 A)
HPxS LOT[1] (HXPCIXCAP2A )
HP xSOC (HxGNLEDA )
HPxSO L (HxAM LEDA)
P xIRQ [15] (HxSW ITCHA)
HPxS ORR# (HxBUSENA# )
HP xSIL# (HxCLK ENA#)
3.3V
10K
P xPCIXCAP
8 .2K
HPxSO R# (HxRES ETB#)
HP xSOL R (HxPW RE NB)
P xIRQ[9] (HxFAULTB #)
PxIRQ[8] (HxPRS NT2 B)
P xRE Q[5] (HxPRS NT1B )
P xRE Q[4] (HxM 66ENB )
P xRE Q[3] (HXPCIXCAP1B )
HPxSLO T[0 ] (HXP CIXCA P2B)
HPxSIC (HxG NL EDNB)
HP xSID (HxAM LEDB )
PxIRQ[10] (HxSW ITCHB )
P xGNT[4 ] (HxBUSENB #)
P xGNT[3 ] (HxCLKENB# )
3.3V
PW ROK
Inverter
Input to PW ROK
Design Guide
Note * All PCI signals m uxed or not need to follow PCI spec 2.2 pullup requirem ents
33
3.3V
33
33
15K
P xM 66EN
85
100 K
330
D1 4:2
3.3V
M UX
D2
330
SE L
10K
1 0K
Switch
3 30
330
ENB
10K
ENB
Switch
1K
85
PxA D[63:0]
PxC/BE[7:0]
PxP AR
P CI BUS SIGNALS
PxP AR64
PCI BUS SIGNAL S
PxREQ 64#
85
PxA CK 64#
Slot 1 Bus
PxFRAM E#
Busen# Switch
PxIRDY#
PxTRDY#
PxS TO P#
PxPCLK O 0 PxDEV SEL#
PxP LOCK#
Slot 1 Clock
PxP ERR#
Switch
PxS ERR#
PxREQ 0#
Clken # P xPCLKO 0
CLK
PxG NT0 #
RST #
Pw ren 1 --12V --12V
Power
Fault# +12V +12V
Logic +5V +5V
+3V +3V
S LOT 1 P resent 1
S LOT 1 P resent 2
3.3V
15K
Truth Table
SEL D1 D2
0 S1 S2
M 66E N
1 S3 S4
3.3 V
5K
5K
3 .3V
3.3V
10K
8.2K 3.3V
3.3 V
5.6 K
2.2K
1 0K
Com pa rato r
3.3V
10K
PCIXCA P
8 .2K
Co mp arator
®
Intel 82870P2 (P64H2)
8 5
PxAD[63:0]
PxC/BE[7:0]
PxPA R
P CI BUS SIGNALS
PxPA R64
PCI BUS SIGNAL S
PxREQ 64#
PxACK 64#
Slot 2 Bus
PxFRAM E#
Busen# Switch
PxIRDY#
PxTRDY#
PxSTO P#
PxP CL KO 1 PxDEV SEL#
PxPL OCK#
Slot 1 Clock
PxPE RR#
Switch
PxSE RR#
PxREQ 0#
Clke n# P xPCLKO 1
CL K
PxG NT1 #
RST #
Pw ren 1 --12 V --12 V
Power
Fault# +12V +12V
Logic +5V +5V
+3V +3V
S LOT 1 Present 1
S LOT 1 Present 2
3.3V 3 .3V
5 K
15K
5 K
M 66 EN
3.3V
3 .3V
10K
8.2K 3.3V
3.3V
5 .6K
2.2 K
10K
Com para tor
3.3V
10K
P CIXCA P
8.2K
3.3V
10 K
Com pa rato r
111