Clock Synthesizer - Intel Xeon Design Manual

Processor with 512 kb l2 cache and intel e7500 chipset platform
Hide thumbs Also See for Xeon:
Table of Contents

Advertisement

8
7
+V3_3
30 OHMS
FB4
D
CAD NOTE:
XTAL close to CK 408 <1.5"
14.31818MHZ
CK408_XTAL_IN
CK408_XTAL_OUT
1
2
R949
ICH3_CLK33
53
Y2
C
V3_CLK
65
PCI33_CLK33
57
VIDEO_CLK33
58
R953
FWH_CLK33
66
33
R954
SIO_CLK33
67
33
R959
LPC_CLK33
33
P64H2_1_CLK66
29
R895
P64H2_2_CLK66
33
43
SLOT_D_CLK66
52
ICH3_SLP_S3_N
55
B
CK408_VTT_PWRGD_N
A
8
7
6
CAD NOTE:
Place close to CK 408B <1"
ICH3_CLK14
55
CLK_14MHZ_SIO
67
V3_CLK_A
VIDEO_CLK14
58
CK408B
1
VDD
2
XTAL_IN
3
XTAL_OUT
4
VSS
5
PCIF0
33
6
PCIF1
7
PCIF2
8
VDD1
R951
9
VSS1
10
33
PCI0
R952
11
PCI1
33
12
PCI2
13
PCI3
14
VDD2
15
VSS2
16
PCI4
VSS_IREF
17
PCI5
18
PCI6
USB_48MHZ
19
VDD3
DOT_48MHZ
R894
20
VSS3
VDD_48MHZ
43
21
66BUFF0_3V66_2
VSS_48MHZ
22
66BUFF1_3V66_3
3V66_1_VCH
23
R896
66BUFF2_3V66_4
PCI_STOP_N
24
66IN_3V66_5
43
25
PWRDWN_N
26
VDDA
27
VSSA
28
VTT_PWRGD_N
U60
CAD Note:
Ground flood around CK-408B.

Clock Synthesizer

6
5
4
If using CK408, Depopulate R755, R756
R552
and populate 10K R930 and R931
22
R756
R551
33
22
R755
R899
33
22
R553
CAD NOTE:
33
No Stubs!
V3_CLK
R544
33
65
56
REF0
5%
5%
55
S1
54
CPU3
53
CPU_3
52
CPU0
51
CPU_0
50
V3_CLK
VDD6
65
49
CPU1_BCLK0_R
CPU1
48
CPU1_BCLK1_R
CPU_1
47
VSS4
46
VDD4
45
FSB_HCLKP_R
CPU2
44
FSB_HCLKN_R
CPU_2
R538
43
V3_CLK
CK408_MULT0
MULT0
65
42
10K
IREF
41
40
S2
R955
39
ICH3_CLK48
55
33
38
37
R897
MCH_CLK66
36
11
43
35
CLK66_1
R534
34
CK408_PCISTP_N
R898
33
CLK66_0
10K
3V66_0
43
32
ICH3_CLK66
VDD5
31
VSS5
30
I2C_BUS3_CLK
SCLK
16-19,22-25,80,81
29
I2C_BUS3_DAT
SDATA
16-19,22-25,80,81
+V3_3
CK408B
5
4
3
ITP_BCLK0
CAD NOTE:
Trace lengths MUST BE > 3" routed length matched
ITP_BCLK1
CPU0_BCLK0
CAD NOTE:
Trace lengths MUST BE > 3" routed length matched
CPU0_BCLK1
CAD NOTE:
Trace lengths MUST BE > 3" routed length matched
R543
CPU1_BCLK0
33
R542
CPU1_BCLK1
33
CAD NOTE:
Trace lengths MUST BE > 3" routed length matched
R540
FSB_H_CLKINP
33
R541
FSB_H_CLKINN
33
V3_CLK
65
55
V3_CLK
65
30 OHMS
FB5
TITLE:
INTEL(R) E7500 CHIPSET CUSTOMER REFERENCE SCHEMATICS
Platform Apps Engineering
R
1900 Prairie City Road
Folsom, California 095630
3
2
1
9
9
D
6
6
4
4
C
10
10
B
A
SHEET
LAST REVISED:
65
03/04/02
2
1

Advertisement

Table of Contents
loading

Table of Contents