Idsel Implementation; Smbus Address; Idsel Sample Implementation Circuit; Smbus Address Configuration - Intel Xeon Design Manual

®
Intel 82870P2 (P64H2)
8.1.5

IDSEL Implementation

Designers should use a 100 Ω series coupling resistor on the IDSEL signal when implementing
PCI-X. Though the PCI-X Addendum PCI Local Bus Specification, Revision 1.0 calls for a 2 kΩ
resistor, the current specification, PCI-X Addendum to the PCI Local Bus Specification, Revision
1.0a allows for other resistor values. See
coupling resistor. IDSEL mapping per P64H2 pin is arbitrary. However, AD16 is reserved.
Figure 8-6. IDSEL Sample Implementation Circuit
8.1.6

SMBus Address

The SMBus interface does not have configuration registers. The SMBus address is set by the states
of pins PA_GNT[5:4] and PB_GNT[5:4] when PWROK is asserted as described in
Refer to the Intel
strap latching.
Table 8-7. SMBus Address Configuration
Bit
7
6
5
4
3
2
1
NOTE: There is no bit 0 because it is the read/write direction indicator.
98
Figure 8-6
®
Intel
P64H2
Ω
100
IDSEL0
Ω
100
IDSEL1
Ω
100
IDSEL2
Ω
100
IDSEL3
®
PCI-64 Hub 2 (P64H2) Datasheet for a more detailed description of P64H2
Value
1
1
PA_GNT[5]
0
PA_GNT[4]
PB_GNT[5]
PB_GNT[4]
for an example of how to implement the
Table 8-7.
Design Guide