Intel ® 82562Et/Em Guidelines; Guidelines For Intel ® 82562Et/Em Component Placement; Crystals And Oscillators - Intel Xeon Design Manual

I/O Controller Hub
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9.7.3 Intel
For documentation on LAN, refer to
follow the general guidelines outlined in
82562ET or 82562EM Platform LAN connect component are provided in the following sections.
9.7.3.1 Guidelines for Intel
Component placement can affect signal quality, emissions, and temperature of a board design. This
section provides guidelines for component placement.
Careful component placement can:
•
Decrease potential problems directly related to electromagnetic interference (EMI), which can
cause failure to meet FCC and IEEE test specifications.
•
Simplify the task of routing traces. To some extent, component orientation affects the
complexity of trace routing. The overall objective is to minimize turns and crossovers between
traces.
Minimizing the amount of space needed for the Ethernet LAN interface is important because all
other interfaces compete for physical space on a motherboard near the connector edge. As with
most subsystems, the Ethernet LAN circuits must be as close as possible to the connector. Thus, it
is imperative that all designs be optimized to fit in a very small space.
9.7.3.2

Crystals and Oscillators

To minimize the effects of EMI, clock sources should not be placed near I/O ports or board edges.
Radiation from these devices may be coupled onto the I/O ports or out of the system chassis.
Crystals should also be kept away from the Ethernet magnetics module to prevent interference of
communication. The retaining straps of the crystal (if they should exist) should be grounded to
prevent possibility of radiation from the crystal case, and the crystal should lay flat against the PC
board to provide better coupling of the electromagnetic fields to the board.
For noise free and stable operation, place the crystal and associated discretes as close as possible to
the 82562ET or 82562EM, keeping the trace length as short as possible. Do not route any noisy
signals in this area.
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82562ET/EM Guidelines
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82562ET/EM Component Placement
Section 1.1. For correct LAN performance, designers must
Section 9.7.2. Additional guidelines for implementing an
Design Guide