Intel Xeon Design Manual page 290

8 7
+V5_0
RT5
1 2
THRMSTR
1.10A
D
1 8
KBDATA CON_KBDATA
67
FB17
2 7
KBCLK CON_KBCLK
67
FB17
4 5
MSDATA CON_MSDATA
67
FB17
3 6
MSCLK CON_MSCLK
67
FB17
Mouse & Keyboard
C
+V5_0
MMDB914
1
CR45
Parallel Port
LPT_SLCT
67
LPT_PE
67
LPT_BUSY
67
B
LPT_ACK_N
67
RP207
LPT_PD7 LPT_PD7_R
67
4 5
LPT_PD6
67
3 6
33
LPT_PD5
67
2 7
LPT_PD4
67
1 8
LPT_PD4_R
RP210
LPT_PD3 LPT_PD3_R
67
4 5
LPT_SLCTIN_N LPT_SELECTIN_N_R
67
3 6
33
LPT_PD2 LPT_PD2_R
67
2 7
LPT_INIT_N LPT_INIT_N_R
67
1 8
RP209
LPT_PD1 LPT_PD1_R
67
4 5
LPT_PD0 LPT_PD0_R
67
3 6
33
LPT_ALF_N LPT_ALF_N_R
A
67
2 7
LPT_STROBE_N LPT_STROBE_N_R
67
1 8
LPT_ERROR_N
67
8 7
6
50 OHMS
V5_KB_RT V5_KB
FB18
3
LPT_V5_0
LPT_PD6_R
LPT_PD5_R
6
5 4
Legacy I/O
J40
1
2
3
4
5
6
7
8 17
9 16
10 15
11 14
12 13
PS2_STACK_CON
J31
13
25
12
24
11
23
10
22
9
21
8
20
7
19
6
18
5
17
4
16
3
15
2
14
1
DB-25
5 4
3 2
J35
SERIAL_PORT
1
DCD
6
DSR
2
RXD
7
RTS
Serial Port
3
TXD
8
CTS
4
DTR
9
RI
5
GND
U61
+V12 +V5_0
TI_GD57232
1 20
VDD VCC
SER_DCD 2 19 COM_DCD1_N
RA1 RY1
SER_DSR 3 18 COM_DSR1_N
RA2 RY2
SER_RXD 4 17 COM_RXD1
RA3 RY3
SER_RTS 5 16 COM_RTS1_N
DY1 DA1
SER_TXD 6 15 COM_TXD1
DY2 DA2
SER_CTS 7 14 COM_CTS1_N
RA4 RY4
SER_DTR 8 13 COM_DTR1_N
DY3 DA3
SER_RI 9 12 COM_RI1_N
RA5 RY5
10 11
VSS GND
-V12
Floppy Connector
J34
2
1
DRVEN0
4
3
6
DRVEN1
8
7
INDEX_N
10
9
MTR0_N
12
11
14
13
DS0_N
16
15
18
17
DIR_N
20
19
STEP_N
22
21
WDATA_N
24
23
WGATE_N
26
25
TRK0_N
28
27
WRTPRT_N
30
29
RDATA_N
32
31
HDSEL_N
34
33
DSKCHG_N
RP205
1
2
1K
3
4
R559
1K
TITLE:
INTEL(R) E7500 CHIPSET CUSTOMER REFERENCE SCHEMATICS
Platform Apps Engineering
R
1900 Prairie City Road
LAST REVISED:
Folsom, California 095630
3 2
1
D
67
67
67
67
67
67
67
67
C
67
B
67
67
67
67
67
67
67
67
67
67
67
+V5_0
67
67
8
7
6
A
5
SHEET
68
03/04/02
1