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INTEL(R) XEON(TM) PROCESSOR WITH 512KB L2 CACHE
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AND INTEL(R) E7500 CHIPSET
REFERENCE SCHEMATICS
THESE SCHEMATICS ARE SUBJECT TO CHANGE.
INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL(R) PRODUCTS.
NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY
RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS
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OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. INTEL
PRODUCTS ARE NOT INTENDED FOR USE IN MEDICAL, LIFE SAVING OR LIFE SUSTAINING APPLICATIONS.
INTEL MAY MAKE CHANGES TO SECIFICATIONS AND PRODUCT DESCRIPTIONS AT ANY TIME WITHOUT NOTICE.
DESIGNERS MUST NOT RELY ON THE ABSENCE OR CHARACTERISTICS OF ANY FEATURES OR INSTRUCTIONS
MARKED "RESERVED" OR "UNDEFINED." INTEL RESERVES THESE FOR FUTURE DEFINITION AND SHALL
HAVE NO RESPONSIBILITY WNATSOEVER FOR CONFLICTS OR INCOMPATIBILITIES ARISING FROM FUTURE
CHANGES TO THEM.
THE INTEL(R) XEON(TM) PROCESSOR AND THE INTEL(R) E7500 CHIPSET PLATFORM MAY CONTAIN DESIGN
DEFECTS OR ERRORS KNOWN AS ERRATA WHICH MAY CAUSE THE PRODUCT TO DEVIATE FROM PUBLISHED
SPECIFICATIONS. CURRENT CHARACTERIZED ERRATA ARE AVAILABLE ON REQUEST.
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SUBSIDIARIES IN THE UNITED STATES AND OTHER COUNTRIES.
*OTHER NAMES AND BRANDS MAY BE CLAIMED AS THE PROPERTY OF OTHERS.
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TITLE:
INTEL(R) E7500 CHIPSET CUSTOMER REFERENCE SCHEMATICS
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Platform Apps Engineering
1900 Prairie City Road
LAST REVISED:
Folsom, California 095630
03/04/02
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SHEET
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